target/mips: Check alignment for microMIPS pre-R6 LD/ST multiple
Pre-REL6 microMIPS requires alignment while REL6 microMIPS does not. Use @default_tcg_memop_mask in gen_ldst_multiple(), it is set to MO_UNALN for REL6 but MO_ALIGN for pre-REL6. Fixes: 3c824109da0 ("target-mips: microMIPS ASE support") Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260417035734.32334-5-philmd@linaro.org>
Philippe Mathieu-Daudé committed
Apr 16, 2026 at 22:40 UTC
42905fe2eca40d0231e96bb9c4187332c23df21a
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target/mips/tcg/micromips_translate.c.inc
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@@ -693,7 +693,7 @@ static void gen_ldst_multiple(DisasContext *ctx, uint32_t opc, int reglist,
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int base, int16_t offset)
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{
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TCGv t0, t1;
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- MemOp mop = MO_UNALN;
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+ MemOp mop = ctx->default_tcg_memop_mask;
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MemOpIdx oi;
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if (ctx->hflags & MIPS_HFLAG_BMASK) {