target/mips: add Octeon LWUX instruction
LWUX performs an indexed unsigned word load from base + index and zero-extends the result into rd. Add the decode entry and route it through the common indexed-load translator with MO_UL. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20260520172313.23777-13-philmd@linaro.org>
James Hilliard committed
May 8, 2026 at 10:50 UTC
47aad5e8e3f09fe562012fad1e8feb1e1728fa76
2 files changed
+2
target/mips/tcg/octeon.decode
+1
@@ -50,5 +50,6 @@ LWX 011111 ..... ..... ..... 00000 001010 @lx
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LHX 011111 ..... ..... ..... 00100 001010 @lx
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LHUX 011111 ..... ..... ..... 10100 001010 @lx
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LBUX 011111 ..... ..... ..... 00110 001010 @lx
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+LWUX 011111 ..... ..... ..... 10000 001010 @lx
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LBX 011111 ..... ..... ..... 10110 001010 @lx
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LDX 011111 ..... ..... ..... 01000 001010 @lx
target/mips/tcg/octeon_translate.c
+1
@@ -166,4 +166,5 @@ TRANS(LBUX, trans_lx, MO_UB);
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TRANS(LHX, trans_lx, MO_SW);
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TRANS(LHUX, trans_lx, MO_UW);
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TRANS(LWX, trans_lx, MO_SL);
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+TRANS(LWUX, trans_lx, MO_UL);
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TRANS(LDX, trans_lx, MO_UQ);