target/arm/tcg/translate.h: replace target_long with int64_t
target_long is used to represent a pc diff. Checked all call sites to make sure we were already passing signed values, so extending works as expected. Use vaddr for pc_curr and pc_save. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20260219040150.2098396-14-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pierrick Bouvier committed
Feb 18, 2026 at 20:01 UTC
596081113bdd947ac8d8c85ba4a491df439c4d0d
3 files changed
+16
-16
target/arm/tcg/translate-a32.h
+1
-1
@@ -40,7 +40,7 @@ void write_neon_element64(TCGv_i64 src, int reg, int ele, MemOp memop);
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TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs);
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void gen_set_cpsr(TCGv_i32 var, uint32_t mask);
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void gen_set_condexec(DisasContext *s);
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-void gen_update_pc(DisasContext *s, target_long diff);
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+void gen_update_pc(DisasContext *s, int64_t diff);
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void gen_lookup_tb(DisasContext *s);
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long vfp_reg_offset(bool dp, unsigned reg);
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long neon_full_reg_offset(unsigned reg);
target/arm/tcg/translate.c
+9
-9
@@ -253,12 +253,12 @@ static inline int get_a32_user_mem_index(DisasContext *s)
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}
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/* The pc_curr difference for an architectural jump. */
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-static target_long jmp_diff(DisasContext *s, target_long diff)
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+static int64_t jmp_diff(DisasContext *s, int64_t diff)
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{
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return diff + (s->thumb ? 4 : 8);
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}
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-static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long diff)
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+static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, int64_t diff)
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{
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assert(s->pc_save != -1);
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if (tb_cflags(s->base.tb) & CF_PCREL) {
@@ -738,7 +738,7 @@ void gen_set_condexec(DisasContext *s)
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}
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}
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-void gen_update_pc(DisasContext *s, target_long diff)
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+void gen_update_pc(DisasContext *s, int64_t diff)
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{
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gen_pc_plus_diff(s, cpu_R[15], diff);
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s->pc_save = s->pc_curr + diff;
@@ -1058,7 +1058,7 @@ static void gen_exception(int excp, uint32_t syndrome)
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tcg_constant_i32(syndrome));
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}
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-static void gen_exception_insn_el_v(DisasContext *s, target_long pc_diff,
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+static void gen_exception_insn_el_v(DisasContext *s, int64_t pc_diff,
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int excp, uint32_t syn, TCGv_i32 tcg_el)
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{
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if (s->aarch64) {
@@ -1071,14 +1071,14 @@ static void gen_exception_insn_el_v(DisasContext *s, target_long pc_diff,
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s->base.is_jmp = DISAS_NORETURN;
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}
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-void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp,
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+void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp,
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uint32_t syn, uint32_t target_el)
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{
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gen_exception_insn_el_v(s, pc_diff, excp, syn,
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tcg_constant_i32(target_el));
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}
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-void gen_exception_insn(DisasContext *s, target_long pc_diff,
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+void gen_exception_insn(DisasContext *s, int64_t pc_diff,
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int excp, uint32_t syn)
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{
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if (s->aarch64) {
@@ -1313,7 +1313,7 @@ static void gen_goto_ptr(void)
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* cpu_loop_exec. Any live exit_requests will be processed as we
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* enter the next TB.
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*/
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-static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, target_long diff)
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+static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, int64_t diff)
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{
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if (translator_use_goto_tb(&s->base, s->pc_curr + diff)) {
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/*
@@ -1340,7 +1340,7 @@ static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, target_long diff)
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}
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/* Jump, specifying which TB number to use if we gen_goto_tb() */
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-static void gen_jmp_tb(DisasContext *s, target_long diff, int tbno)
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+static void gen_jmp_tb(DisasContext *s, int64_t diff, int tbno)
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{
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if (unlikely(s->ss_active)) {
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/* An indirect jump so that we still trigger the debug exception. */
@@ -1383,7 +1383,7 @@ static void gen_jmp_tb(DisasContext *s, target_long diff, int tbno)
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}
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}
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-static inline void gen_jmp(DisasContext *s, target_long diff)
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+static inline void gen_jmp(DisasContext *s, int64_t diff)
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{
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gen_jmp_tb(s, diff, 0);
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}
target/arm/tcg/translate.h
+6
-6
@@ -27,8 +27,8 @@ typedef struct DisasLabel {
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typedef struct DisasDelayException {
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struct DisasDelayException *next;
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TCGLabel *lab;
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- target_long pc_curr;
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- target_long pc_save;
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+ vaddr pc_curr;
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+ vaddr pc_save;
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int condexec_mask;
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int condexec_cond;
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uint32_t excp;
@@ -359,14 +359,14 @@ static inline int curr_insn_len(DisasContext *s)
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#ifdef TARGET_AARCH64
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void a64_translate_init(void);
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-void gen_a64_update_pc(DisasContext *s, target_long diff);
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+void gen_a64_update_pc(DisasContext *s, int64_t diff);
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extern const TranslatorOps aarch64_translator_ops;
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#else
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static inline void a64_translate_init(void)
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{
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}
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-static inline void gen_a64_update_pc(DisasContext *s, target_long diff)
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+static inline void gen_a64_update_pc(DisasContext *s, int64_t diff)
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{
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}
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#endif
@@ -377,9 +377,9 @@ void arm_gen_test_cc(int cc, TCGLabel *label);
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MemOp pow2_align(unsigned i);
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void unallocated_encoding(DisasContext *s);
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void gen_exception_internal(int excp);
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-void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp,
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+void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp,
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uint32_t syn, uint32_t target_el);
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-void gen_exception_insn(DisasContext *s, target_long pc_diff,
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+void gen_exception_insn(DisasContext *s, int64_t pc_diff,
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int excp, uint32_t syn);
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TCGLabel *delay_exception_el(DisasContext *s, int excp,
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uint32_t syn, uint32_t target_el);