target/riscv: Factor tiny ldn() helper in gdbstub
In preparation of having this helper handle CPU runtime endianness changes, factor the ldn() helper out. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260318103122.97244-8-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Philippe Mathieu-Daudé committed
Mar 18, 2026 at 11:31 UTC
5a70352f835ab1be5f2fb5af5932da50d1290161
1 file changed
+13
-9
target/riscv/gdbstub.c
+13
-9
@@ -47,6 +47,11 @@ static const struct TypeSize vec_lanes[] = {
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{ "uint8", "bytes", 8, 'b' },
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};
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+static uint64_t ldn(CPURISCVState *env, uint8_t *mem_buf, size_t regsz)
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+{
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+ return ldn_p(mem_buf, regsz);
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+}
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+
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int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs);
@@ -84,15 +89,15 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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switch (mcc->def->misa_mxl_max) {
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case MXL_RV32:
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- tmp = (int32_t)ldl_p(mem_buf);
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+ tmp = (int32_t)ldn(env, mem_buf, 4);
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length = 4;
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break;
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case MXL_RV64:
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case MXL_RV128:
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if (env->xl < MXL_RV64) {
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- tmp = (int32_t)ldq_p(mem_buf);
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+ tmp = (int32_t)ldn(env, mem_buf, 8);
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} else {
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- tmp = ldq_p(mem_buf);
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+ tmp = ldn(env, mem_buf, 8);
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}
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length = 8;
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break;
@@ -130,7 +135,7 @@ static int riscv_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n)
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CPURISCVState *env = &cpu->env;
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if (n < 32) {
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- env->fpr[n] = ldq_p(mem_buf); /* always 64-bit */
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+ env->fpr[n] = ldn(env, mem_buf, 8); /* always 64-bit */
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return sizeof(uint64_t);
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}
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return 0;
@@ -162,7 +167,7 @@ static int riscv_gdb_set_vector(CPUState *cs, uint8_t *mem_buf, int n)
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if (n < 32) {
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int i;
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for (i = 0; i < vlenb; i += 8) {
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- env->vreg[(n * vlenb + i) / 8] = ldq_p(mem_buf + i);
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+ env->vreg[(n * vlenb + i) / 8] = ldn(env, mem_buf + i, 8);
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}
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return vlenb;
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}
@@ -194,7 +199,7 @@ static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem_buf, int n)
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const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8;
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if (n < CSR_TABLE_SIZE) {
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- uint64_t val = ldn_p(mem_buf, regsz);
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+ uint64_t val = ldn(env, mem_buf, regsz);
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int result;
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result = riscv_csrrw_debug(env, n, NULL, val, -1);
@@ -230,8 +235,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n)
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const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8;
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#ifndef CONFIG_USER_ONLY
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CPURISCVState *env = &cpu->env;
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-
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- target_ulong new_priv = ldn_p(mem_buf, regsz) & 0x3;
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+ uint64_t new_priv = ldn(env, mem_buf, regsz) & 0x3;
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bool new_virt = 0;
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if (new_priv == PRV_RESERVED) {
@@ -239,7 +243,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n)
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}
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if (new_priv != PRV_M) {
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- new_virt = (ldn_p(mem_buf, regsz) & BIT(2)) >> 2;
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+ new_virt = (ldn(env, mem_buf, regsz) & BIT(2)) >> 2;
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}
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if (riscv_has_ext(env, RVH) && new_virt != env->virt_enabled) {