@samitouri / QOSamiQemu / commits / 5e82d46227

target/riscv: Replace MO_TE -> MO_LE

We only build the RISC-V target using little endianness order, therefore the MO_TE definitions expand to the little endian one. Use the latter which is more explicit. Mechanical change running: $ sed -i -e s/MO_TE/MO_LE/ \ $(git grep -wl MO_TE target/riscv/) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260318103122.97244-15-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Philippe Mathieu-Daudé committed Mar 18, 2026 at 11:31 UTC 5e82d462273c71e9a1d573965e0ae243712de49a
2 files changed +2 -2
target/riscv/internals.h
+1 -1
@@ -71,7 +71,7 @@ static inline MemOp mo_endian_env(CPURISCVState *env)
71 * - MSTATUS_MBE (Machine-mode)
72 * but we don't implement that yet.
73 */
74 - return MO_TE;
74 + return MO_LE;
75 }
76
77 /* share data between vector helpers and decode code */
target/riscv/translate.c
+1 -1
@@ -135,7 +135,7 @@ static inline MemOp mo_endian(DisasContext *ctx)
135 * - MSTATUS_MBE (Machine-mode)
136 * but we don't implement that yet.
137 */
138 - return MO_TE;
138 + return MO_LE;
139 }
140
141 #ifdef TARGET_RISCV32