@samitouri / QOSamiQemu / commits / 63088d6422

hw/npcm7xx_fiu: Specify .impl for npcm7xx_fiu_flash_ops

Currently npcm7xx_fiu_flash_ops provides no .impl substruct; this means that it gets the default of "implements 1, 2 and 4 byte aligned accesses". This is more constrained than the device permits in its .valid substruct, and also narrower than the functions are written to handle. Add a .impl substruct matching the .valid substruct; this means that all guest accesses are handled directly by the read and write functions, and are never synthesized by the memory subsystem performing multiple accesses to the device (which would not behave correctly, as these read and write fucntions have side effects). Based-on-a-patch-by: CJ Chen <cjchen@igel.co.jp> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Link: https://lore.kernel.org/r/20260428093339.2087081-3-peter.maydell@linaro.org Signed-off-by: Peter Xu <peterx@redhat.com>

Peter Maydell committed Apr 28, 2026 at 10:33 UTC 63088d64229bd45cb0d620facde0436090e4267b
1 file changed +5
hw/ssi/npcm7xx_fiu.c
+5
@@ -250,6 +250,11 @@ static const MemoryRegionOps npcm7xx_fiu_flash_ops = {
250 .read = npcm7xx_fiu_flash_read,
251 .write = npcm7xx_fiu_flash_write,
252 .endianness = DEVICE_LITTLE_ENDIAN,
253 + .impl = {
254 + .min_access_size = 1,
255 + .max_access_size = 8,
256 + .unaligned = true,
257 + },
258 .valid = {
259 .min_access_size = 1,
260 .max_access_size = 8,