@samitouri / QOSamiQemu / commits / 686ca0434c

target/riscv: Use explicit little-endian LD/ST API

We only build our RISC-V targets as little-endian, therefore the LD/ST API expands to its little-endian variant. Directly use the latter. Mechanical change running: $ for a in uw w l q; do \ sed -i -e "s/ld${a}_p(/ld${a}_le_p(/" \ $(git grep -wlE '(ld|st)u?[wlq]_p' target/riscv); done Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260318103122.97244-3-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Philippe Mathieu-Daudé committed Mar 18, 2026 at 11:31 UTC 686ca0434c609f3f19604deb90c1e3c2ffb6a5e9
1 file changed +2 -2
target/riscv/cpu_helper.c
+2 -2
@@ -1365,9 +1365,9 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
1365 }
1366
1367 if (riscv_cpu_mxl(env) == MXL_RV32) {
1368 - pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
1368 + pte = address_space_ldl_le(cs->as, pte_addr, attrs, &res);
1369 } else {
1370 - pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
1370 + pte = address_space_ldq_le(cs->as, pte_addr, attrs, &res);
1371 }
1372
1373 if (res != MEMTX_OK) {