target/arm: Rename Aarch64-specific methods
Various Aarch64 specific methods start with the 'aarch64_' prefix. Rename few more emphasizing Aarch64 specific features. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Message-id: 20260507134709.70507-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé committed
May 7, 2026 at 15:47 UTC
7031702527010fba40cd1e7b05a0f5e86c17f523
4 files changed
+18
-18
target/arm/cpu.c
+4
-4
@@ -1707,25 +1707,25 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
1707
Error *local_err = NULL;
1708
1709
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
1710
- arm_cpu_sve_finalize(cpu, &local_err);
1710
+ aarch64_cpu_sve_finalize(cpu, &local_err);
1711
if (local_err != NULL) {
1712
error_propagate(errp, local_err);
1713
return;
1714
}
1715
1716
- arm_cpu_sme_finalize(cpu, &local_err);
1716
+ aarch64_cpu_sme_finalize(cpu, &local_err);
1717
if (local_err != NULL) {
1718
error_propagate(errp, local_err);
1719
return;
1720
}
1721
1722
- arm_cpu_pauth_finalize(cpu, &local_err);
1722
+ aarch64_cpu_pauth_finalize(cpu, &local_err);
1723
if (local_err != NULL) {
1724
error_propagate(errp, local_err);
1725
return;
1726
}
1727
1728
- arm_cpu_lpa2_finalize(cpu, &local_err);
1728
+ aarch64_cpu_lpa2_finalize(cpu, &local_err);
1729
if (local_err != NULL) {
1730
error_propagate(errp, local_err);
1731
return;
target/arm/cpu32-stubs.c
+4
-4
@@ -4,22 +4,22 @@
4
#include "target/arm/cpu.h"
5
#include "target/arm/internals.h"
6
7
-void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp)
7
+void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp)
8
{
9
g_assert_not_reached();
10
}
11
12
-void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
12
+void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
13
{
14
g_assert_not_reached();
15
}
16
17
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
17
+void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
18
{
19
g_assert_not_reached();
20
}
21
22
-void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp)
22
+void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp)
23
{
24
g_assert_not_reached();
25
}
target/arm/cpu64.c
+6
-6
@@ -60,7 +60,7 @@ int get_sysreg_idx(ARMSysRegs sysreg)
60
61
#undef DEF
62
63
-void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
63
+void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
64
{
65
/*
66
* If any vector lengths are explicitly enabled with sve<N> properties,
@@ -121,7 +121,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
121
* Disable all SVE extensions as well. Note that some ZFR0
122
* fields are used also by SME so must not be wiped in
123
* an SME-no-SVE config. We will clear the rest in
124
- * arm_cpu_sme_finalize() if necessary.
124
+ * aarch_cpu_sme_finalize() if necessary.
125
*/
126
FIELD_DP64_IDREG(&cpu->isar, ID_AA64ZFR0, F64MM, 0);
127
FIELD_DP64_IDREG(&cpu->isar, ID_AA64ZFR0, F32MM, 0);
@@ -336,7 +336,7 @@ static void cpu_arm_set_sve(Object *obj, bool value, Error **errp)
336
FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR0, SVE, value);
337
}
338
339
-void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp)
339
+void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp)
340
{
341
uint32_t vq_map = cpu->sme_vq.map;
342
uint32_t vq_init = cpu->sme_vq.init;
@@ -408,7 +408,7 @@ static void cpu_arm_set_sme(Object *obj, bool value, Error **errp)
408
/*
409
* For now, write 0 for "off" and 1 for "on" into the PFR1 field.
410
* We will correct this value to report the right SME
411
- * level (SME vs SME2) in arm_cpu_sme_finalize() later.
411
+ * level (SME vs SME2) in aarch_cpu_sme_finalize() later.
412
*/
413
FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR1, SME, value);
414
}
@@ -548,7 +548,7 @@ void aarch64_add_sme_properties(Object *obj)
548
#endif
549
}
550
551
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
551
+void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
552
{
553
ARMPauthFeature features = cpu_isar_feature(pauth_feature, cpu);
554
ARMISARegisters *isar = &cpu->isar;
@@ -666,7 +666,7 @@ void aarch64_add_pauth_properties(Object *obj)
666
}
667
}
668
669
-void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp)
669
+void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp)
670
{
671
uint64_t t;
672
target/arm/internals.h
+4
-4
@@ -1750,10 +1750,10 @@ int aarch64_gdb_get_tag_ctl_reg(CPUState *cs, GByteArray *buf, int reg);
1750
int aarch64_gdb_set_tag_ctl_reg(CPUState *cs, uint8_t *buf, int reg);
1751
int aarch64_gdb_get_tls_reg(CPUState *cs, GByteArray *buf, int reg);
1752
int aarch64_gdb_set_tls_reg(CPUState *cs, uint8_t *buf, int reg);
1753
-void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
1754
-void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
1755
-void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
1756
-void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp);
1753
+void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
1754
+void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
1755
+void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
1756
+void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp);
1757
void aarch64_max_tcg_initfn(Object *obj);
1758
void aarch64_add_pauth_properties(Object *obj);
1759
void aarch64_add_sve_properties(Object *obj);