@samitouri / QOSamiQemu / commits / 7170bddcd9

target/riscv: Replace ldtul_p() -> ldn_p()

Prefer ldn_p(riscv_cpu_is_32bit) over target-specific ldtul_p(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com> Message-ID: <20260219191955.83815-28-philmd@linaro.org>

Philippe Mathieu-Daudé committed Mar 25, 2025 at 16:48 UTC 7170bddcd92cb4fab66619e087b6d8a4c185b50c
1 file changed +8 -6
target/riscv/gdbstub.c
+8 -6
@@ -191,14 +191,15 @@ static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem_buf, int n)
191 {
192 RISCVCPU *cpu = RISCV_CPU(cs);
193 CPURISCVState *env = &cpu->env;
194 + const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8;
195
196 if (n < CSR_TABLE_SIZE) {
196 - target_ulong val = ldtul_p(mem_buf);
197 + target_ulong val = ldn_p(mem_buf, regsz);
198 int result;
199
200 result = riscv_csrrw_debug(env, n, NULL, val, -1);
201 if (result == RISCV_EXCP_NONE) {
201 - return sizeof(target_ulong);
202 + return regsz;
203 }
204 }
205 return 0;
@@ -225,11 +226,12 @@ static int riscv_gdb_get_virtual(CPUState *cs, GByteArray *buf, int n)
226 static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n)
227 {
228 if (n == 0) {
228 -#ifndef CONFIG_USER_ONLY
229 RISCVCPU *cpu = RISCV_CPU(cs);
230 + const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8;
231 +#ifndef CONFIG_USER_ONLY
232 CPURISCVState *env = &cpu->env;
233
232 - target_ulong new_priv = ldtul_p(mem_buf) & 0x3;
234 + target_ulong new_priv = ldn_p(mem_buf, regsz) & 0x3;
235 bool new_virt = 0;
236
237 if (new_priv == PRV_RESERVED) {
@@ -237,7 +239,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n)
239 }
240
241 if (new_priv != PRV_M) {
240 - new_virt = (ldtul_p(mem_buf) & BIT(2)) >> 2;
242 + new_virt = (ldn_p(mem_buf, regsz) & BIT(2)) >> 2;
243 }
244
245 if (riscv_has_ext(env, RVH) && new_virt != env->virt_enabled) {
@@ -246,7 +248,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n)
248
249 riscv_cpu_set_mode(env, new_priv, new_virt);
250 #endif
249 - return sizeof(target_ulong);
251 + return regsz;
252 }
253 return 0;
254 }