target/arm: Explode MO_TExx -> MO_TE | MO_xx
Extract the implicit MO_TE definition in order to replace it in the next commit. Mechanical change using: $ for n in UW UL UQ UO SW SL SQ; do \ sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \ $(git grep -l MO_TE$n target/arm); \ done Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260414005348.4767-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé committed
Apr 14, 2026 at 02:53 UTC
7ed4df28dfae199fd8d0be3e71bbdaf27e07c9ed
2 files changed
+45
-40
target/arm/tcg/m_helper.c
+3
-3
@@ -634,7 +634,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
634
635
/* Note that these stores can throw exceptions on MPU faults */
636
ARMMMUIdx mmu_idx = arm_mmu_idx(env);
637
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN,
637
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN,
638
arm_to_core_mmu_idx(mmu_idx));
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cpu_stl_mmu(env, sp, nextinst, oi, GETPC());
640
cpu_stl_mmu(env, sp + 4, saved_psr, oi, GETPC());
@@ -1055,7 +1055,7 @@ void HELPER(v7m_vlstm)(CPUARMState *env, uint32_t fptr)
1055
bool lspact = env->v7m.fpccr[s] & R_V7M_FPCCR_LSPACT_MASK;
1056
uintptr_t ra = GETPC();
1057
ARMMMUIdx mmu_idx = arm_mmu_idx(env);
1058
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN,
1058
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN,
1059
arm_to_core_mmu_idx(mmu_idx));
1060
1061
assert(env->v7m.secure);
@@ -1131,7 +1131,7 @@ void HELPER(v7m_vlldm)(CPUARMState *env, uint32_t fptr)
1131
ARMCPU *cpu = env_archcpu(env);
1132
uintptr_t ra = GETPC();
1133
ARMMMUIdx mmu_idx = arm_mmu_idx(env);
1134
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN,
1134
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN,
1135
arm_to_core_mmu_idx(mmu_idx));
1136
1137
/* fptr is the value of Rn, the frame pointer we load the FP regs from */
target/arm/tcg/mve_helper.c
+42
-37
@@ -194,23 +194,23 @@ static void mve_advance_vpt(CPUARMState *env)
194
}
195
196
DO_VLDR(vldrb, MO_UB, 1, uint8_t, ldb, 1, uint8_t)
197
-DO_VLDR(vldrh, MO_TEUW, 2, uint16_t, ldw, 2, uint16_t)
198
-DO_VLDR(vldrw, MO_TEUL, 4, uint32_t, ldl, 4, uint32_t)
197
+DO_VLDR(vldrh, MO_TE | MO_UW, 2, uint16_t, ldw, 2, uint16_t)
198
+DO_VLDR(vldrw, MO_TE | MO_UL, 4, uint32_t, ldl, 4, uint32_t)
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DO_VSTR(vstrb, MO_UB, 1, stb, 1, uint8_t)
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-DO_VSTR(vstrh, MO_TEUW, 2, stw, 2, uint16_t)
202
-DO_VSTR(vstrw, MO_TEUL, 4, stl, 4, uint32_t)
201
+DO_VSTR(vstrh, MO_TE | MO_UW, 2, stw, 2, uint16_t)
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+DO_VSTR(vstrw, MO_TE | MO_UL, 4, stl, 4, uint32_t)
203
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DO_VLDR(vldrb_sh, MO_SB, 1, int8_t, ldb, 2, int16_t)
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DO_VLDR(vldrb_sw, MO_SB, 1, int8_t, ldb, 4, int32_t)
206
DO_VLDR(vldrb_uh, MO_UB, 1, uint8_t, ldb, 2, uint16_t)
207
DO_VLDR(vldrb_uw, MO_UB, 1, uint8_t, ldb, 4, uint32_t)
208
-DO_VLDR(vldrh_sw, MO_TESW, 2, int16_t, ldw, 4, int32_t)
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-DO_VLDR(vldrh_uw, MO_TEUW, 2, uint16_t, ldw, 4, uint32_t)
208
+DO_VLDR(vldrh_sw, MO_TE | MO_SW, 2, int16_t, ldw, 4, int32_t)
209
+DO_VLDR(vldrh_uw, MO_TE | MO_UW, 2, uint16_t, ldw, 4, uint32_t)
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DO_VSTR(vstrb_h, MO_UB, 1, stb, 2, int16_t)
212
DO_VSTR(vstrb_w, MO_UB, 1, stb, 4, int32_t)
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-DO_VSTR(vstrh_w, MO_TEUW, 2, stw, 4, int32_t)
213
+DO_VSTR(vstrh_w, MO_TE | MO_UW, 2, stw, 4, int32_t)
214
215
#undef DO_VLDR
216
#undef DO_VSTR
@@ -295,7 +295,7 @@ DO_VSTR(vstrh_w, MO_TEUW, 2, stw, 4, int32_t)
295
unsigned e; \
296
uint32_t addr; \
297
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
298
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
298
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
299
for (e = 0; e < 16 / 4; e++, mask >>= 4, eci_mask >>= 4) { \
300
if (!(eci_mask & 1)) { \
301
continue; \
@@ -321,7 +321,7 @@ DO_VSTR(vstrh_w, MO_TEUW, 2, stw, 4, int32_t)
321
unsigned e; \
322
uint32_t addr; \
323
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
324
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
324
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
325
for (e = 0; e < 16 / 4; e++, mask >>= 4, eci_mask >>= 4) { \
326
if (!(eci_mask & 1)) { \
327
continue; \
@@ -345,42 +345,47 @@ DO_VSTR(vstrh_w, MO_TEUW, 2, stw, 4, int32_t)
345
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DO_VLDR_SG(vldrb_sg_sh, MO_SB, int8_t, ldb, 2, int16_t, uint16_t, ADDR_ADD, false)
347
DO_VLDR_SG(vldrb_sg_sw, MO_SB, int8_t, ldb, 4, int32_t, uint32_t, ADDR_ADD, false)
348
-DO_VLDR_SG(vldrh_sg_sw, MO_TESW, int16_t, ldw, 4, int32_t, uint32_t, ADDR_ADD, false)
348
+DO_VLDR_SG(vldrh_sg_sw, MO_TE | MO_SW, int16_t, ldw, 4,
349
+ int32_t, uint32_t, ADDR_ADD, false)
350
351
DO_VLDR_SG(vldrb_sg_ub, MO_UB, uint8_t, ldb, 1, uint8_t, uint8_t, ADDR_ADD, false)
352
DO_VLDR_SG(vldrb_sg_uh, MO_UB, uint8_t, ldb, 2, uint16_t, uint16_t, ADDR_ADD, false)
353
DO_VLDR_SG(vldrb_sg_uw, MO_UB, uint8_t, ldb, 4, uint32_t, uint32_t, ADDR_ADD, false)
353
-DO_VLDR_SG(vldrh_sg_uh, MO_TEUW, uint16_t, ldw, 2, uint16_t, uint16_t, ADDR_ADD, false)
354
-DO_VLDR_SG(vldrh_sg_uw, MO_TEUW, uint16_t, ldw, 4, uint32_t, uint32_t, ADDR_ADD, false)
355
-DO_VLDR_SG(vldrw_sg_uw, MO_TEUL, uint32_t, ldl, 4, uint32_t, uint32_t, ADDR_ADD, false)
354
+DO_VLDR_SG(vldrh_sg_uh, MO_TE | MO_UW, uint16_t, ldw, 2,
355
+ uint16_t, uint16_t, ADDR_ADD, false)
356
+DO_VLDR_SG(vldrh_sg_uw, MO_TE | MO_UW, uint16_t, ldw, 4,
357
+ uint32_t, uint32_t, ADDR_ADD, false)
358
+DO_VLDR_SG(vldrw_sg_uw, MO_TE | MO_UL, uint32_t, ldl, 4,
359
+ uint32_t, uint32_t, ADDR_ADD, false)
360
DO_VLDR64_SG(vldrd_sg_ud, ADDR_ADD, false)
361
358
-DO_VLDR_SG(vldrh_sg_os_sw, MO_TESW, int16_t, ldw, 4,
362
+DO_VLDR_SG(vldrh_sg_os_sw, MO_TE | MO_SW, int16_t, ldw, 4,
363
int32_t, uint32_t, ADDR_ADD_OSH, false)
360
-DO_VLDR_SG(vldrh_sg_os_uh, MO_TEUW, uint16_t, ldw, 2,
364
+DO_VLDR_SG(vldrh_sg_os_uh, MO_TE | MO_UW, uint16_t, ldw, 2,
365
uint16_t, uint16_t, ADDR_ADD_OSH, false)
362
-DO_VLDR_SG(vldrh_sg_os_uw, MO_TEUW, uint16_t, ldw, 4,
366
+DO_VLDR_SG(vldrh_sg_os_uw, MO_TE | MO_UW, uint16_t, ldw, 4,
367
uint32_t, uint32_t, ADDR_ADD_OSH, false)
364
-DO_VLDR_SG(vldrw_sg_os_uw, MO_TEUL, uint32_t, ldl, 4,
368
+DO_VLDR_SG(vldrw_sg_os_uw, MO_TE | MO_UL, uint32_t, ldl, 4,
369
uint32_t, uint32_t, ADDR_ADD_OSW, false)
370
DO_VLDR64_SG(vldrd_sg_os_ud, ADDR_ADD_OSD, false)
371
372
DO_VSTR_SG(vstrb_sg_ub, MO_UB, stb, 1, uint8_t, ADDR_ADD, false)
373
DO_VSTR_SG(vstrb_sg_uh, MO_UB, stb, 2, uint16_t, ADDR_ADD, false)
374
DO_VSTR_SG(vstrb_sg_uw, MO_UB, stb, 4, uint32_t, ADDR_ADD, false)
371
-DO_VSTR_SG(vstrh_sg_uh, MO_TEUW, stw, 2, uint16_t, ADDR_ADD, false)
372
-DO_VSTR_SG(vstrh_sg_uw, MO_TEUW, stw, 4, uint32_t, ADDR_ADD, false)
373
-DO_VSTR_SG(vstrw_sg_uw, MO_TEUL, stl, 4, uint32_t, ADDR_ADD, false)
375
+DO_VSTR_SG(vstrh_sg_uh, MO_TE | MO_UW, stw, 2, uint16_t, ADDR_ADD, false)
376
+DO_VSTR_SG(vstrh_sg_uw, MO_TE | MO_UW, stw, 4, uint32_t, ADDR_ADD, false)
377
+DO_VSTR_SG(vstrw_sg_uw, MO_TE | MO_UL, stl, 4, uint32_t, ADDR_ADD, false)
378
DO_VSTR64_SG(vstrd_sg_ud, ADDR_ADD, false)
379
376
-DO_VSTR_SG(vstrh_sg_os_uh, MO_TEUW, stw, 2, uint16_t, ADDR_ADD_OSH, false)
377
-DO_VSTR_SG(vstrh_sg_os_uw, MO_TEUW, stw, 4, uint32_t, ADDR_ADD_OSH, false)
378
-DO_VSTR_SG(vstrw_sg_os_uw, MO_TEUL, stl, 4, uint32_t, ADDR_ADD_OSW, false)
380
+DO_VSTR_SG(vstrh_sg_os_uh, MO_TE | MO_UW, stw, 2, uint16_t, ADDR_ADD_OSH, false)
381
+DO_VSTR_SG(vstrh_sg_os_uw, MO_TE | MO_UW, stw, 4, uint32_t, ADDR_ADD_OSH, false)
382
+DO_VSTR_SG(vstrw_sg_os_uw, MO_TE | MO_UL, stl, 4, uint32_t, ADDR_ADD_OSW, false)
383
DO_VSTR64_SG(vstrd_sg_os_ud, ADDR_ADD_OSD, false)
384
381
-DO_VLDR_SG(vldrw_sg_wb_uw, MO_TEUL, uint32_t, ldl, 4, uint32_t, uint32_t, ADDR_ADD, true)
385
+DO_VLDR_SG(vldrw_sg_wb_uw, MO_TE | MO_UL, uint32_t, ldl, 4,
386
+ uint32_t, uint32_t, ADDR_ADD, true)
387
DO_VLDR64_SG(vldrd_sg_wb_ud, ADDR_ADD, true)
383
-DO_VSTR_SG(vstrw_sg_wb_uw, MO_TEUL, stl, 4, uint32_t, ADDR_ADD, true)
388
+DO_VSTR_SG(vstrw_sg_wb_uw, MO_TE | MO_UL, stl, 4, uint32_t, ADDR_ADD, true)
389
DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true)
390
391
/*
@@ -408,7 +413,7 @@ DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true)
413
static const uint8_t off[4] = { O1, O2, O3, O4 }; \
414
uint32_t addr, data; \
415
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
411
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
416
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
417
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
418
if ((mask & 1) == 0) { \
419
/* ECI says skip this beat */ \
@@ -434,7 +439,7 @@ DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true)
439
int y; /* y counts 0 2 0 2 */ \
440
uint16_t *qd; \
441
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
437
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
442
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
443
for (beat = 0, y = 0; beat < 4; beat++, mask >>= 4, y ^= 2) { \
444
if ((mask & 1) == 0) { \
445
/* ECI says skip this beat */ \
@@ -461,7 +466,7 @@ DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true)
466
uint32_t *qd; \
467
int y; \
468
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
464
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
469
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
470
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
471
if ((mask & 1) == 0) { \
472
/* ECI says skip this beat */ \
@@ -500,7 +505,7 @@ DO_VLD4W(vld43w, 6, 7, 8, 9)
505
uint32_t addr, data; \
506
uint8_t *qd; \
507
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
503
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
508
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
509
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
510
if ((mask & 1) == 0) { \
511
/* ECI says skip this beat */ \
@@ -526,7 +531,7 @@ DO_VLD4W(vld43w, 6, 7, 8, 9)
531
int e; \
532
uint16_t *qd; \
533
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
529
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
534
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
535
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
536
if ((mask & 1) == 0) { \
537
/* ECI says skip this beat */ \
@@ -551,7 +556,7 @@ DO_VLD4W(vld43w, 6, 7, 8, 9)
556
uint32_t addr, data; \
557
uint32_t *qd; \
558
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
554
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
559
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
560
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
561
if ((mask & 1) == 0) { \
562
/* ECI says skip this beat */ \
@@ -582,7 +587,7 @@ DO_VLD2W(vld21w, 8, 12, 16, 20)
587
static const uint8_t off[4] = { O1, O2, O3, O4 }; \
588
uint32_t addr, data; \
589
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
585
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
590
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
591
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
592
if ((mask & 1) == 0) { \
593
/* ECI says skip this beat */ \
@@ -609,7 +614,7 @@ DO_VLD2W(vld21w, 8, 12, 16, 20)
614
int y; /* y counts 0 2 0 2 */ \
615
uint16_t *qd; \
616
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
612
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
617
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
618
for (beat = 0, y = 0; beat < 4; beat++, mask >>= 4, y ^= 2) { \
619
if ((mask & 1) == 0) { \
620
/* ECI says skip this beat */ \
@@ -635,7 +640,7 @@ DO_VLD2W(vld21w, 8, 12, 16, 20)
640
uint32_t *qd; \
641
int y; \
642
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
638
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
643
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
644
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
645
if ((mask & 1) == 0) { \
646
/* ECI says skip this beat */ \
@@ -674,7 +679,7 @@ DO_VST4W(vst43w, 6, 7, 8, 9)
679
uint32_t addr, data; \
680
uint8_t *qd; \
681
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
677
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
682
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
683
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
684
if ((mask & 1) == 0) { \
685
/* ECI says skip this beat */ \
@@ -701,7 +706,7 @@ DO_VST4W(vst43w, 6, 7, 8, 9)
706
int e; \
707
uint16_t *qd; \
708
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
704
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
709
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
710
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
711
if ((mask & 1) == 0) { \
712
/* ECI says skip this beat */ \
@@ -727,7 +732,7 @@ DO_VST4W(vst43w, 6, 7, 8, 9)
732
uint32_t addr, data; \
733
uint32_t *qd; \
734
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
730
- MemOpIdx oi = make_memop_idx(MO_TEUL | MO_ALIGN, mmu_idx); \
735
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_ALIGN, mmu_idx);\
736
for (beat = 0; beat < 4; beat++, mask >>= 4) { \
737
if ((mask & 1) == 0) { \
738
/* ECI says skip this beat */ \