Merge tag 'pull-fpu-20260224' of https://gitlab.com/rth7680/qemu into staging

- Reformat NaN classification to share code - Fix pseudo-NaN handling in FPATAN/FYL2XP1/FYL2X helpers - Add conversion routines for OCP FP8 and FP4 formats # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmmdOnYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9RJwgAj4rs0Pj9rOMnrmGN # 5EPq2p+Wvjeup59W8WeBJGUS6J8rC05i5fBtcThoRNEGf+w/+8ef8ZlERyv07FIJ # O7RcLDeXWYotH7GMM/1EEi5FHJ4qmYkKjwX3ys6vxblYGa1gPtwUVyrySExqzWqe # T59+ljzYGHka7hXEXx/0yL+ypJv3lidpdPk/a0Ylqi37zwLEuv/FycdlCNSnxNTj # bR+GleqcxigkP7G1Mks5V9MpWWGd2tWloO1EwDieng6bMGom0c+4xNyZ5HCqt+Au # cuGEZRgrfGcA6QpHKs9srVAwDkj4QWSky8ffjPSNbGvNLoGA+7gWE6VFmqlb0yib # vd+Tqw== # =Wpw9 # -----END PGP SIGNATURE----- # gpg: Signature made Tue Feb 24 05:43:18 2026 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-fpu-20260224' of https://gitlab.com/rth7680/qemu: fpu: Add conversion routines for OCP FP4 E2M1 fpu: Add conversion routines for OCP FP8 E4M3 fpu: Add conversion routines for OCP FP8 E5M2 fpu: Add saturate parameter to parts_uncanon fpu: Add overflow_raises_invalid to FloatFmt fpu: Introduce FloatFmtExpMaxKind target/i386: Fix pseudo-NaN handling in FPATAN/FYL2XP1/FYL2X helpers fpu/softfloat: Refactor floatx80 format NaN classification to share code fpu/softfloat: Refactor IEEE format NaN classification to share code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>