hw/arm/fsl-imx8mm: Adding support for ENET ethernet controller
It enables emulation of ENET ethernet controller in iMX8MM Enables testing and debugging of network dependent drivers Added ENET MAC IRQ lines Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gaurav Sharma committed
Apr 21, 2026 at 12:22 UTC
857670200c51643f431791a15f540da1413c9337
4 files changed
+35
-1
hw/arm/Kconfig
+1
@@ -625,6 +625,7 @@ config FSL_IMX8MM
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select FSL_IMX8MP_ANALOG
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select FSL_IMX8MP_CCM
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select IMX
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+ select IMX_FEC
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select IMX_I2C
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select OR_IRQ
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select SDHCI
hw/arm/fsl-imx8mm.c
+24
@@ -212,6 +212,8 @@ static void fsl_imx8mm_init(Object *obj)
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object_initialize_child(obj, name, &s->wdt[i], TYPE_IMX2_WDT);
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}
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+ object_initialize_child(obj, "eth0", &s->enet, TYPE_IMX_ENET);
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+
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object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST);
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object_initialize_child(obj, "pcie_phy", &s->pcie_phy,
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TYPE_FSL_IMX8M_PCIE_PHY);
@@ -547,6 +549,21 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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qdev_get_gpio_in(gicdev, spi_table[i].irq));
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}
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+ /* ENET1 */
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+ object_property_set_uint(OBJECT(&s->enet), "phy-num", s->phy_num,
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+ &error_abort);
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+ object_property_set_uint(OBJECT(&s->enet), "tx-ring-num", 3, &error_abort);
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+ qemu_configure_nic_device(DEVICE(&s->enet), true, NULL);
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+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->enet), errp)) {
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+ return;
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+ }
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+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->enet), 0,
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+ fsl_imx8mm_memmap[FSL_IMX8MM_ENET1].addr);
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+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 0,
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+ qdev_get_gpio_in(gicdev, FSL_IMX8MM_ENET1_MAC_IRQ));
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+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 1,
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+ qdev_get_gpio_in(gicdev, FSL_IMX6_ENET1_MAC_1588_IRQ));
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+
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/* SNVS */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
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return;
@@ -610,6 +627,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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case FSL_IMX8MM_GPIO1 ... FSL_IMX8MM_GPIO5:
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case FSL_IMX8MM_GPT1 ... FSL_IMX8MM_GPT6:
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case FSL_IMX8MM_ECSPI1 ... FSL_IMX8MM_ECSPI3:
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+ case FSL_IMX8MM_ENET1:
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case FSL_IMX8MM_I2C1 ... FSL_IMX8MM_I2C4:
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case FSL_IMX8MM_PCIE1:
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case FSL_IMX8MM_PCIE_PHY1:
@@ -631,10 +649,16 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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}
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}
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+static const Property fsl_imx8mm_properties[] = {
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+ DEFINE_PROP_UINT32("fec1-phy-num", FslImx8mmState, phy_num, 0),
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+ DEFINE_PROP_BOOL("fec1-phy-connected", FslImx8mmState, phy_connected, true),
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+};
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+
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static void fsl_imx8mm_class_init(ObjectClass *oc, const void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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+ device_class_set_props(dc, fsl_imx8mm_properties);
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dc->realize = fsl_imx8mm_realize;
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dc->desc = "i.MX 8MM SoC";
hw/arm/imx8mm-evk.c
+1
@@ -79,6 +79,7 @@ static void imx8mm_evk_init(MachineState *machine)
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s = FSL_IMX8MM(object_new_with_props(TYPE_FSL_IMX8MM, OBJECT(machine),
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"soc", &error_fatal, NULL));
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+ object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
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memory_region_add_subregion(get_system_memory(), FSL_IMX8MM_RAM_START,
include/hw/arm/fsl-imx8mm.h
+9
-1
@@ -18,7 +18,8 @@
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#include "hw/misc/imx7_snvs.h"
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#include "hw/misc/imx8mp_analog.h"
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#include "hw/misc/imx8mp_ccm.h"
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-#include "hw/or-irq.h"
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+#include "hw/net/imx_fec.h"
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+#include "hw/core/or-irq.h"
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#include "hw/pci-host/designware.h"
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#include "hw/pci-host/fsl_imx8m_phy.h"
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#include "hw/sd/sdhci.h"
@@ -60,11 +61,15 @@ struct FslImx8mmState {
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IMXI2CState i2c[FSL_IMX8MM_NUM_I2CS];
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IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];
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MemoryRegion ocram;
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+ IMXFECState enet;
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SDHCIState usdhc[FSL_IMX8MM_NUM_USDHCS];
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IMX2WdtState wdt[FSL_IMX8MM_NUM_WDTS];
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DesignwarePCIEHost pcie;
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FslImx8mPciePhyState pcie_phy;
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OrIRQState gpt5_gpt6_irq;
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+
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+ uint32_t phy_num;
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+ bool phy_connected;
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};
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enum FslImx8mmMemoryRegions {
@@ -218,6 +223,9 @@ enum FslImx8mmIrqs {
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FSL_IMX8MM_WDOG2_IRQ = 79,
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FSL_IMX8MM_WDOG3_IRQ = 10,
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+ FSL_IMX8MM_ENET1_MAC_IRQ = 118,
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+ FSL_IMX6_ENET1_MAC_1588_IRQ = 121,
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+
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FSL_IMX8MM_PCI_INTA_IRQ = 122,
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FSL_IMX8MM_PCI_INTB_IRQ = 123,
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FSL_IMX8MM_PCI_INTC_IRQ = 124,