target/riscv: Replace MO_TE by mo_endian (MIPS extension)
Replace compile-time MO_TE evaluation by runtime mo_endian() one, which expand target endianness from DisasContext. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260318103122.97244-12-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Philippe Mathieu-Daudé committed
Mar 18, 2026 at 11:31 UTC
8a7746eb8f22944d2cc146cf10fc49d0dcdb0e49
1 file changed
+16
-8
target/riscv/insn_trans/trans_xmips.c.inc
+16
-8
@@ -47,6 +47,8 @@ static bool trans_ccmov(DisasContext *ctx, arg_ccmov *a)
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/* Load Doubleword Pair. */
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static bool trans_ldp(DisasContext *ctx, arg_ldp *a)
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{
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+ MemOp memop = MO_SQ | mo_endian(ctx);
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+
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REQUIRE_XMIPSLSP(ctx);
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REQUIRE_64_OR_128BIT(ctx);
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@@ -56,11 +58,11 @@ static bool trans_ldp(DisasContext *ctx, arg_ldp *a)
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TCGv addr = tcg_temp_new();
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tcg_gen_addi_tl(addr, src, a->imm_y);
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- tcg_gen_qemu_ld_tl(dest0, addr, ctx->mem_idx, MO_TE | MO_SQ);
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+ tcg_gen_qemu_ld_tl(dest0, addr, ctx->mem_idx, memop);
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gen_set_gpr(ctx, a->rd, dest0);
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tcg_gen_addi_tl(addr, addr, 8);
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- tcg_gen_qemu_ld_tl(dest1, addr, ctx->mem_idx, MO_TE | MO_SQ);
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+ tcg_gen_qemu_ld_tl(dest1, addr, ctx->mem_idx, memop);
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gen_set_gpr(ctx, a->rs3, dest1);
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return true;
@@ -69,6 +71,8 @@ static bool trans_ldp(DisasContext *ctx, arg_ldp *a)
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/* Load Word Pair. */
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static bool trans_lwp(DisasContext *ctx, arg_lwp *a)
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{
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+ MemOp memop = MO_SL | mo_endian(ctx);
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+
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REQUIRE_XMIPSLSP(ctx);
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TCGv src = get_gpr(ctx, a->rs1, EXT_NONE);
@@ -77,11 +81,11 @@ static bool trans_lwp(DisasContext *ctx, arg_lwp *a)
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TCGv addr = tcg_temp_new();
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tcg_gen_addi_tl(addr, src, a->imm_x);
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- tcg_gen_qemu_ld_tl(dest0, addr, ctx->mem_idx, MO_TE | MO_SL);
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+ tcg_gen_qemu_ld_tl(dest0, addr, ctx->mem_idx, memop);
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gen_set_gpr(ctx, a->rd, dest0);
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tcg_gen_addi_tl(addr, addr, 4);
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- tcg_gen_qemu_ld_tl(dest1, addr, ctx->mem_idx, MO_TE | MO_SL);
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+ tcg_gen_qemu_ld_tl(dest1, addr, ctx->mem_idx, memop);
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gen_set_gpr(ctx, a->rs3, dest1);
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return true;
@@ -90,6 +94,8 @@ static bool trans_lwp(DisasContext *ctx, arg_lwp *a)
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/* Store Doubleword Pair. */
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static bool trans_sdp(DisasContext *ctx, arg_sdp *a)
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{
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+ MemOp memop = MO_UQ | mo_endian(ctx);
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+
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REQUIRE_XMIPSLSP(ctx);
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REQUIRE_64_OR_128BIT(ctx);
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@@ -99,10 +105,10 @@ static bool trans_sdp(DisasContext *ctx, arg_sdp *a)
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TCGv addr = tcg_temp_new();
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tcg_gen_addi_tl(addr, src, a->imm_w);
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- tcg_gen_qemu_st_tl(data0, addr, ctx->mem_idx, MO_TE | MO_UQ);
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+ tcg_gen_qemu_st_tl(data0, addr, ctx->mem_idx, memop);
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tcg_gen_addi_tl(addr, addr, 8);
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- tcg_gen_qemu_st_tl(data1, addr, ctx->mem_idx, MO_TE | MO_UQ);
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+ tcg_gen_qemu_st_tl(data1, addr, ctx->mem_idx, memop);
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return true;
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}
@@ -110,6 +116,8 @@ static bool trans_sdp(DisasContext *ctx, arg_sdp *a)
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/* Store Word Pair. */
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static bool trans_swp(DisasContext *ctx, arg_swp *a)
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{
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+ MemOp memop = MO_SL | mo_endian(ctx);
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+
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REQUIRE_XMIPSLSP(ctx);
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TCGv src = get_gpr(ctx, a->rs1, EXT_NONE);
@@ -118,10 +126,10 @@ static bool trans_swp(DisasContext *ctx, arg_swp *a)
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TCGv addr = tcg_temp_new();
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tcg_gen_addi_tl(addr, src, a->imm_v);
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- tcg_gen_qemu_st_tl(data0, addr, ctx->mem_idx, MO_TE | MO_SL);
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+ tcg_gen_qemu_st_tl(data0, addr, ctx->mem_idx, memop);
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tcg_gen_addi_tl(addr, addr, 4);
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- tcg_gen_qemu_st_tl(data1, addr, ctx->mem_idx, MO_TE | MO_SL);
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+ tcg_gen_qemu_st_tl(data1, addr, ctx->mem_idx, memop);
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return true;
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}