target/arm: migrate eret trap syndromes to registerfields
For simplicity keep the OP as a two bit field rather than the two interlinked fields in the docs (ERET/ERETA). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20260422125250.1303100-5-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée committed
Apr 22, 2026 at 13:52 UTC
9082db3e05485b422c669b3820d5a6a5dcc831b2
1 file changed
+10
-1
target/arm/syndrome.h
+10
-1
@@ -367,12 +367,21 @@ static inline uint32_t syn_sve_access_trap(void)
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}
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/*
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+ * ISS encoding for an exception from an ERET, ERETAA or ERETAB
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+ * instructions.
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+ *
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* eret_op is bits [1:0] of the ERET instruction, so:
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* 0 for ERET, 2 for ERETAA, 3 for ERETAB.
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*/
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+FIELD(ERET_ISS, OP, 0, 2)
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+
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static inline uint32_t syn_erettrap(int eret_op)
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{
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- return (EC_ERETTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL | eret_op;
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+ uint32_t res = syn_set_ec(0, EC_ERETTRAP);
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+ res = FIELD_DP32(res, SYNDROME, IL, 1);
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+ res = FIELD_DP32(res, ERET_ISS, OP, eret_op);
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+
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+ return res;
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}
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static inline uint32_t syn_smetrap(SMEExceptionType etype, bool is_16bit)