hw/arm: Remove qcom-dc-scm-v1-bmc and qcom-firework-bmc machines
The qcom-dc-scm-v1-bmc and qcom-firework-bmc machines were deprecated in QEMU 10.2 and are now removed in QEMU 11.1. These Qualcomm lab servers never entered production and do not rely on specific device models. They can be replaced by the ast2600-evb machine with appropriate fmc-model and I2C device configuration via command line. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20260510165704.2935316-3-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Cédric Le Goater committed
May 10, 2026 at 18:57 UTC
976c26a9c3fd648e505f5020349e0a7da13d4fa7
6 files changed
+12
-162
docs/about/deprecated.rst
-10
@@ -250,16 +250,6 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
250
better reflects the way this property affects all random data within
251
the device tree blob, not just the ``kaslr-seed`` node.
252
253
-Arm ``qcom-dc-scm-v1-bmc`` and ``qcom-firework-bmc`` machine (since 10.2)
254
-'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
255
-
256
-The ``qcom-dc-scm-v1-bmc`` and ``qcom-firework-bmc`` represent lab
257
-servers that never entered production. Since they do not rely on any
258
-specific device models, they can be replaced by the ``ast2600-evb``
259
-machine using the ``fmc-model`` option to specify the flash type. The
260
-I2C devices connected to the board can be defined via the QEMU command
261
-line.
262
-
253
Arm ``fp5280g2-bmc`` machine (since 10.2)
254
'''''''''''''''''''''''''''''''''''''''''
255
docs/about/removed-features.rst
+10
@@ -1195,6 +1195,16 @@ using the ``fmc-model`` option to specify the flash type. The I2C
1195
devices connected to the board can be defined via the QEMU command
1196
line.
1197
1198
+Arm ``qcom-dc-scm-v1-bmc`` and ``qcom-firework-bmc`` machine (removed in 11.1)
1199
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
1200
+
1201
+The ``qcom-dc-scm-v1-bmc`` and ``qcom-firework-bmc`` represent lab
1202
+servers that never entered production. Since they do not rely on any
1203
+specific device models, they can be replaced by the ``ast2600-evb``
1204
+machine using the ``fmc-model`` option to specify the flash type. The
1205
+I2C devices connected to the board can be defined via the QEMU command
1206
+line.
1207
+
1208
linux-user mode CPUs
1209
--------------------
1210
docs/system/arm/aspeed.rst
+2
-4
@@ -1,5 +1,5 @@
1
-Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``gb200nvl-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
2
-===============================================================================================================================================================================================================================================================================================================================================================================================
1
+Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``gb200nvl-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
2
+================================================================================================================================================================================================================================================================================================================================================
3
4
The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
5
Aspeed evaluation boards. They are based on different releases of the
@@ -35,8 +35,6 @@ AST2600 SoC based machines :
35
- ``bletchley-bmc`` Facebook Bletchley BMC
36
- ``fby35-bmc`` Facebook fby35 BMC
37
- ``gb200nvl-bmc`` Nvidia GB200nvl BMC
38
-- ``qcom-dc-scm-v1-bmc`` Qualcomm DC-SCM V1 BMC
39
-- ``qcom-firework-bmc`` Qualcomm Firework BMC
38
39
Supported devices
40
-----------------
hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c
deleted
-55
@@ -1,55 +0,0 @@
1
-/*
2
- * Qualcomm DC-SCM V1
3
- *
4
- * Copyright 2016 IBM Corp.
5
- *
6
- * SPDX-License-Identifier: GPL-2.0-or-later
7
- */
8
-
9
-#include "qemu/osdep.h"
10
-#include "qapi/error.h"
11
-#include "hw/arm/machines-qom.h"
12
-#include "hw/arm/aspeed.h"
13
-#include "hw/arm/aspeed_soc.h"
14
-
15
-/* Qualcomm DC-SCM hardware value */
16
-#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
17
-#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
18
-
19
-static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
20
-{
21
- AspeedSoCState *soc = bmc->soc;
22
-
23
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
24
-}
25
-
26
-static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
27
- const void *data)
28
-{
29
- MachineClass *mc = MACHINE_CLASS(oc);
30
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
31
-
32
- mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
33
- mc->deprecation_reason = "use 'ast2600-evb' instead";
34
- amc->soc_name = "ast2600-a3";
35
- amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
36
- amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
37
- amc->fmc_model = "n25q512a";
38
- amc->spi_model = "n25q512a";
39
- amc->num_cs = 2;
40
- amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
41
- amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
42
- mc->default_ram_size = 1 * GiB;
43
- aspeed_machine_class_init_cpus_defaults(mc);
44
-};
45
-
46
-static const TypeInfo aspeed_ast2600_qcom_dc_scm_v1_types[] = {
47
- {
48
- .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
49
- .parent = TYPE_ASPEED_MACHINE,
50
- .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
51
- .interfaces = arm_machine_interfaces,
52
- }
53
-};
54
-
55
-DEFINE_TYPES(aspeed_ast2600_qcom_dc_scm_v1_types)
hw/arm/aspeed_ast2600_qcom-firework.c
deleted
-91
@@ -1,91 +0,0 @@
1
-/*
2
- * Qualcomm DC-SCM V1/Firework
3
- *
4
- * Copyright 2016 IBM Corp.
5
- *
6
- * SPDX-License-Identifier: GPL-2.0-or-later
7
- */
8
-
9
-#include "qemu/osdep.h"
10
-#include "qapi/error.h"
11
-#include "hw/arm/machines-qom.h"
12
-#include "hw/arm/aspeed.h"
13
-#include "hw/arm/aspeed_soc.h"
14
-#include "hw/i2c/i2c_mux_pca954x.h"
15
-#include "hw/sensor/tmp105.h"
16
-
17
-/* Qualcomm DC-SCM Firework hardware value */
18
-#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1 0x00000000
19
-#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2 0x00000041
20
-
21
-#define TYPE_LM75 TYPE_TMP105
22
-
23
-static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
24
-{
25
- AspeedSoCState *soc = bmc->soc;
26
-
27
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
28
-}
29
-
30
-static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
31
-{
32
- AspeedSoCState *soc = bmc->soc;
33
- I2CSlave *therm_mux, *cpuvr_mux;
34
-
35
- /* Create the generic DC-SCM hardware */
36
- qcom_dc_scm_bmc_i2c_init(bmc);
37
-
38
- /* Now create the Firework specific hardware */
39
-
40
- /* I2C7 CPUVR MUX */
41
- cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
42
- "pca9546", 0x70);
43
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
44
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
45
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
46
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
47
-
48
- /* I2C8 Thermal Diodes*/
49
- therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
50
- "pca9548", 0x70);
51
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
52
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
53
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
54
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
55
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
56
-
57
- /* I2C9 Fan Controller (MAX31785) */
58
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
59
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
60
-}
61
-
62
-static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
63
- const void *data)
64
-{
65
- MachineClass *mc = MACHINE_CLASS(oc);
66
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
67
-
68
- mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
69
- mc->deprecation_reason = "use 'ast2600-evb' instead";
70
- amc->soc_name = "ast2600-a3";
71
- amc->hw_strap1 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1;
72
- amc->hw_strap2 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2;
73
- amc->fmc_model = "n25q512a";
74
- amc->spi_model = "n25q512a";
75
- amc->num_cs = 2;
76
- amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
77
- amc->i2c_init = qcom_dc_scm_firework_i2c_init;
78
- mc->default_ram_size = 1 * GiB;
79
- aspeed_machine_class_init_cpus_defaults(mc);
80
-};
81
-
82
-static const TypeInfo aspeed_ast2600_qcom_firework_types[] = {
83
- {
84
- .name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
85
- .parent = TYPE_ASPEED_MACHINE,
86
- .class_init = aspeed_machine_qcom_firework_class_init,
87
- .interfaces = arm_machine_interfaces,
88
- }
89
-};
90
-
91
-DEFINE_TYPES(aspeed_ast2600_qcom_firework_types)
hw/arm/meson.build
-2
@@ -61,8 +61,6 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
61
'aspeed_ast2600_fby35.c',
62
'aspeed_ast2600_fuji.c',
63
'aspeed_ast2600_gb200nvl.c',
64
- 'aspeed_ast2600_qcom-dc-scm-v1.c',
65
- 'aspeed_ast2600_qcom-firework.c',
64
'aspeed_ast2600_rainier.c',
65
'aspeed_ast10x0.c',
66
'aspeed_ast10x0_evb.c',