@samitouri / QOSamiQemu / commits / 9a25e7b24e

target/arm: Hoist MO_TE into mve_advance_vpt()

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260414005348.4767-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Philippe Mathieu-Daudé committed Apr 14, 2026 at 02:53 UTC 9a25e7b24e4d6c416275907f8ffaeca50fb575ad
1 file changed +11 -9
target/arm/tcg/mve_helper.c
+11 -9
@@ -160,7 +160,8 @@ static void mve_advance_vpt(CPUARMState *env)
160 uint16_t eci_mask = mve_eci_mask(env); \
161 unsigned b, e; \
162 int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
163 - MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx); \
163 + MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN, \
164 + mmu_idx); \
165 /* \
166 * R_SXTM allows the dest reg to become UNKNOWN for abandoned \
167 * beats so we don't care if we update part of the dest and \
@@ -183,7 +184,8 @@ static void mve_advance_vpt(CPUARMState *env)
184 uint16_t mask = mve_element_mask(env); \
185 unsigned b, e; \
186 int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
186 - MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx); \
187 + MemOpIdx oi = make_memop_idx(MO_TE | MFLAG | MO_ALIGN, \
188 + mmu_idx); \
189 for (b = 0, e = 0; b < 16; b += ESIZE, e++) { \
190 if (mask & (1 << b)) { \
191 cpu_##STTYPE##_mmu(env, addr, d[H##ESIZE(e)], oi, GETPC()); \
@@ -194,23 +196,23 @@ static void mve_advance_vpt(CPUARMState *env)
196 }
197
198 DO_VLDR(vldrb, MO_UB, 1, uint8_t, ldb, 1, uint8_t)
197 -DO_VLDR(vldrh, MO_TE | MO_UW, 2, uint16_t, ldw, 2, uint16_t)
198 -DO_VLDR(vldrw, MO_TE | MO_UL, 4, uint32_t, ldl, 4, uint32_t)
199 +DO_VLDR(vldrh, MO_UW, 2, uint16_t, ldw, 2, uint16_t)
200 +DO_VLDR(vldrw, MO_UL, 4, uint32_t, ldl, 4, uint32_t)
201
202 DO_VSTR(vstrb, MO_UB, 1, stb, 1, uint8_t)
201 -DO_VSTR(vstrh, MO_TE | MO_UW, 2, stw, 2, uint16_t)
202 -DO_VSTR(vstrw, MO_TE | MO_UL, 4, stl, 4, uint32_t)
203 +DO_VSTR(vstrh, MO_UW, 2, stw, 2, uint16_t)
204 +DO_VSTR(vstrw, MO_UL, 4, stl, 4, uint32_t)
205
206 DO_VLDR(vldrb_sh, MO_SB, 1, int8_t, ldb, 2, int16_t)
207 DO_VLDR(vldrb_sw, MO_SB, 1, int8_t, ldb, 4, int32_t)
208 DO_VLDR(vldrb_uh, MO_UB, 1, uint8_t, ldb, 2, uint16_t)
209 DO_VLDR(vldrb_uw, MO_UB, 1, uint8_t, ldb, 4, uint32_t)
208 -DO_VLDR(vldrh_sw, MO_TE | MO_SW, 2, int16_t, ldw, 4, int32_t)
209 -DO_VLDR(vldrh_uw, MO_TE | MO_UW, 2, uint16_t, ldw, 4, uint32_t)
210 +DO_VLDR(vldrh_sw, MO_SW, 2, int16_t, ldw, 4, int32_t)
211 +DO_VLDR(vldrh_uw, MO_UW, 2, uint16_t, ldw, 4, uint32_t)
212
213 DO_VSTR(vstrb_h, MO_UB, 1, stb, 2, int16_t)
214 DO_VSTR(vstrb_w, MO_UB, 1, stb, 4, int32_t)
213 -DO_VSTR(vstrh_w, MO_TE | MO_UW, 2, stw, 4, int32_t)
215 +DO_VSTR(vstrh_w, MO_UW, 2, stw, 4, int32_t)
216
217 #undef DO_VLDR
218 #undef DO_VSTR