@samitouri / QOSamiQemu / commits / 9cafae3f75

ppc/pnv: Move SBE host doorbell function to top of file

Moved 'pnv_sbe_set_host_doorbell' as-it-is to above 'pnv_sbe_power9_xscom_ctrl_write'. This is done since in a future patch, S0 interrupt implementation uses 'pnv_sbe_set_host_doorbell', hence the host doorbell function needs to be declared/defined before 'pnv_sbe_power9_xscom_ctrl_write' where we implement the S0 interrupt. No functional change. Reviewed-by: Hari Bathini <hbathini@linux.ibm.com> Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Tested-by: Shivang Upadhyay <shivangu@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20260424083837.214947-2-adityag@linux.ibm.com Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

Aditya Gupta committed Apr 24, 2026 at 14:08 UTC 9cafae3f75411108b3560c220247be2184db1feb
1 file changed +9 -9
hw/ppc/pnv_sbe.c
+9 -9
@@ -80,6 +80,15 @@
80 #define SBE_CONTROL_REG_S0 PPC_BIT(14)
81 #define SBE_CONTROL_REG_S1 PPC_BIT(15)
82
83 +static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val)
84 +{
85 + val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */
86 + sbe->host_doorbell = val;
87 +
88 + trace_pnv_sbe_reg_set_host_doorbell(val);
89 + qemu_set_irq(sbe->psi_irq, !!val);
90 +}
91 +
92 struct sbe_msg {
93 uint64_t reg[4];
94 };
@@ -125,15 +134,6 @@ static const MemoryRegionOps pnv_sbe_power9_xscom_ctrl_ops = {
134 .endianness = DEVICE_BIG_ENDIAN,
135 };
136
128 -static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val)
129 -{
130 - val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */
131 - sbe->host_doorbell = val;
132 -
133 - trace_pnv_sbe_reg_set_host_doorbell(val);
134 - qemu_set_irq(sbe->psi_irq, !!val);
135 -}
136 -
137 /* SBE Target Type */
138 #define SBE_TARGET_TYPE_PROC 0x00
139 #define SBE_TARGET_TYPE_EX 0x01