hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI
Replace the temporary custom extension bit (TC[32]) with the standard EN_PRI bit defined in RISC-V IOMMU specification. Signed-off-by: Jay Chang <jay.chang@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Signed-off-by: Jay Chang <jay.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260325014856.58948-1-jay.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Jay Chang committed
Mar 25, 2026 at 09:48 UTC
b8c6f03cbecf11cf15bdcdba8f3b9fa596635e63
1 file changed
+2
-5
hw/riscv/riscv-iommu.c
+2
-5
@@ -1572,11 +1572,8 @@ static int riscv_iommu_translate(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
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riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_URQ);
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iot_cache = g_hash_table_ref(s->iot_cache);
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- /*
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- * TC[32] is reserved for custom extensions, used here to temporarily
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- * enable automatic page-request generation for ATS queries.
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- */
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- enable_pri = (iotlb->perm == IOMMU_NONE) && (ctx->tc & BIT_ULL(32));
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+ enable_pri = (iotlb->perm == IOMMU_NONE) &&
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+ (ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI);
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enable_pid = (ctx->tc & RISCV_IOMMU_DC_TC_PDTV);
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/* Check for ATS request. */