whpx: i386: x2apic emulation
Add x2apic emulation to WHPX for the kernel-irqchip=off case. Unfortunately, it looks like there isn't a workaround available for proper behavior of PIC interrupts when kernel-irqchip=on for Windows 10. The OS is out of support outside of extended security updates so this will not be addressed. The performance boost is quite visible for multicore guests. Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr> Link: https://lore.kernel.org/r/20260422214225.2242-3-mohamed@unpredictable.fr Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Mohamed Mediouni committed
Apr 22, 2026 at 23:41 UTC
ba1bda25b7cf57dd00712c91eedfa9314e2fe30a
1 file changed
+133
-1
target/i386/whpx/whpx-all.c
+133
-1
@@ -1082,6 +1082,8 @@ HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions)
1082
/* Register for MSR and CPUID exits */
1083
memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));
1084
prop.ExtendedVmExits.X64MsrExit = 1;
1085
+ prop.ExtendedVmExits.X64CpuidExit = 1;
1086
+
1087
if (exceptions != 0) {
1088
prop.ExtendedVmExits.ExceptionExit = 1;
1089
}
@@ -1898,6 +1900,18 @@ int whpx_vcpu_run(CPUState *cpu)
1900
WHV_REGISTER_NAME reg_names[3];
1901
UINT32 reg_count;
1902
bool is_known_msr = 0;
1903
+ uint64_t val;
1904
+
1905
+ if (vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {
1906
+ val = ((uint32_t)vcpu->exit_ctx.MsrAccess.Rax) |
1907
+ ((uint64_t)(vcpu->exit_ctx.MsrAccess.Rdx) << 32);
1908
+ } else {
1909
+ /*
1910
+ * Workaround for [-Werror=maybe-uninitialized]
1911
+ * with GCC. Not needed with Clang.
1912
+ */
1913
+ val = 0;
1914
+ }
1915
1916
reg_names[0] = WHvX64RegisterRip;
1917
reg_names[1] = WHvX64RegisterRax;
@@ -1911,7 +1925,47 @@ int whpx_vcpu_run(CPUState *cpu)
1925
&& !vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite
1926
&& !whpx_irqchip_in_kernel()) {
1927
is_known_msr = 1;
1914
- reg_values[1].Reg32 = (uint32_t)X86_CPU(cpu)->env.apic_bus_freq;
1928
+ val = X86_CPU(cpu)->env.apic_bus_freq;
1929
+ }
1930
+
1931
+ if (!whpx_irqchip_in_kernel() &&
1932
+ vcpu->exit_ctx.MsrAccess.MsrNumber == MSR_IA32_APICBASE) {
1933
+ is_known_msr = 1;
1934
+ if (!vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {
1935
+ /* Read path unreachable on Hyper-V */
1936
+ abort();
1937
+ } else {
1938
+ WHV_REGISTER_VALUE reg = {.Reg64 = val};
1939
+ int msr_ret = cpu_set_apic_base(X86_CPU(cpu)->apic_state, val);
1940
+ if (msr_ret < 0) {
1941
+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
1942
+ }
1943
+ whpx_set_reg(cpu, WHvX64RegisterApicBase, reg);
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+ }
1945
+ }
1946
+
1947
+ if (!whpx_irqchip_in_kernel() &&
1948
+ vcpu->exit_ctx.MsrAccess.MsrNumber >= MSR_APIC_START &&
1949
+ vcpu->exit_ctx.MsrAccess.MsrNumber <= MSR_APIC_END) {
1950
+ int index = vcpu->exit_ctx.MsrAccess.MsrNumber - MSR_APIC_START;
1951
+ int msr_ret;
1952
+ is_known_msr = 1;
1953
+ if (!vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {
1954
+ bql_lock();
1955
+ msr_ret = apic_msr_read(X86_CPU(cpu)->apic_state, index, &val);
1956
+ bql_unlock();
1957
+ reg_values[1].Reg64 = val;
1958
+ if (msr_ret < 0) {
1959
+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
1960
+ }
1961
+ } else {
1962
+ bql_lock();
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+ msr_ret = apic_msr_write(X86_CPU(cpu)->apic_state, index, val);
1964
+ bql_unlock();
1965
+ if (msr_ret < 0) {
1966
+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);
1967
+ }
1968
+ }
1969
}
1970
/*
1971
* For all unsupported MSR access we:
@@ -1921,6 +1975,11 @@ int whpx_vcpu_run(CPUState *cpu)
1975
reg_count = vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite ?
1976
1 : 3;
1977
1978
+ if (!vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {
1979
+ reg_values[1].Reg32 = (uint32_t)val;
1980
+ reg_values[2].Reg32 = (uint32_t)(val >> 32);
1981
+ }
1982
+
1983
if (!is_known_msr) {
1984
trace_whpx_unsupported_msr_access(vcpu->exit_ctx.MsrAccess.MsrNumber,
1985
vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite);
@@ -1939,6 +1998,47 @@ int whpx_vcpu_run(CPUState *cpu)
1998
ret = 0;
1999
break;
2000
}
2001
+ case WHvRunVpExitReasonX64Cpuid: {
2002
+ WHV_REGISTER_VALUE reg_values[5] = {0};
2003
+ WHV_REGISTER_NAME reg_names[5];
2004
+ UINT32 reg_count = 5;
2005
+ X86CPU *x86_cpu = X86_CPU(cpu);
2006
+ CPUX86State *env = &x86_cpu->env;
2007
+
2008
+ reg_names[0] = WHvX64RegisterRip;
2009
+ reg_names[1] = WHvX64RegisterRax;
2010
+ reg_names[2] = WHvX64RegisterRcx;
2011
+ reg_names[3] = WHvX64RegisterRdx;
2012
+ reg_names[4] = WHvX64RegisterRbx;
2013
+
2014
+ reg_values[0].Reg64 =
2015
+ vcpu->exit_ctx.VpContext.Rip +
2016
+ vcpu->exit_ctx.VpContext.InstructionLength;
2017
+
2018
+ reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;
2019
+ reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;
2020
+ reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;
2021
+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;
2022
+
2023
+ if (vcpu->exit_ctx.CpuidAccess.Rax == 1) {
2024
+ if (cpu_has_x2apic_feature(env)) {
2025
+ reg_values[2].Reg64 |= CPUID_EXT_X2APIC;
2026
+ }
2027
+ }
2028
+
2029
+ hr = whp_dispatch.WHvSetVirtualProcessorRegisters(
2030
+ whpx->partition,
2031
+ cpu->cpu_index,
2032
+ reg_names, reg_count,
2033
+ reg_values);
2034
+
2035
+ if (FAILED(hr)) {
2036
+ error_report("WHPX: Failed to set CpuidAccess state "
2037
+ " registers, hr=%08lx", hr);
2038
+ }
2039
+ ret = 0;
2040
+ break;
2041
+ }
2042
case WHvRunVpExitReasonException:
2043
whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE);
2044
@@ -2136,6 +2236,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
2236
WHV_PROCESSOR_FEATURES_BANKS processor_features;
2237
WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;
2238
bool is_legacy_os = false;
2239
+ UINT32 cpuidExitList[] = {1};
2240
2241
whpx = &whpx_global;
2242
@@ -2354,6 +2455,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
2455
/* Register for MSR and CPUID exits */
2456
memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));
2457
prop.ExtendedVmExits.X64MsrExit = 1;
2458
+ prop.ExtendedVmExits.X64CpuidExit = 1;
2459
2460
hr = whp_dispatch.WHvSetPartitionProperty(
2461
whpx->partition,
@@ -2366,6 +2468,36 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
2468
goto error;
2469
}
2470
2471
+ memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY));
2472
+ prop.X64MsrExitBitmap.UnhandledMsrs = 1;
2473
+ if (!whpx_irqchip_in_kernel()) {
2474
+ prop.X64MsrExitBitmap.ApicBaseMsrWrite = 1;
2475
+ }
2476
+
2477
+ hr = whp_dispatch.WHvSetPartitionProperty(
2478
+ whpx->partition,
2479
+ WHvPartitionPropertyCodeX64MsrExitBitmap,
2480
+ &prop,
2481
+ sizeof(WHV_PARTITION_PROPERTY));
2482
+ if (FAILED(hr)) {
2483
+ error_report("WHPX: Failed to set MSR exit bitmap, hr=%08lx", hr);
2484
+ ret = -EINVAL;
2485
+ goto error;
2486
+ }
2487
+
2488
+ hr = whp_dispatch.WHvSetPartitionProperty(
2489
+ whpx->partition,
2490
+ WHvPartitionPropertyCodeCpuidExitList,
2491
+ cpuidExitList,
2492
+ RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));
2493
+
2494
+ if (FAILED(hr)) {
2495
+ error_report("WHPX: Failed to set partition CpuidExitList hr=%08lx",
2496
+ hr);
2497
+ ret = -EINVAL;
2498
+ goto error;
2499
+ }
2500
+
2501
/*
2502
* We do not want to intercept any exceptions from the guest,
2503
* until we actually start debugging with gdb.