@samitouri / QOSamiQemu / commits / cf884c075e

exec: Drop TARGET_PHYS_ADDR_SPACE_BITS

The macro is no longer in use and can safely be dropped. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Anton Johansson <anjo@rev.ng> Message-ID: <20260218-phys_addr-v6-7-a603bf363218@rev.ng> [PMD: Keep TARGET_PHYS_ADDR_SPACE_BITS poisoned] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Anton Johansson committed Dec 9, 2025 at 14:56 UTC cf884c075e8720ce44e3a2bf6c2760e9dac83f12
20 files changed -38
include/exec/cpu-defs.h
-3
@@ -28,9 +28,6 @@
28 #ifndef TARGET_LONG_BITS
29 # error TARGET_LONG_BITS must be defined in cpu-param.h
30 #endif
31 -#ifndef TARGET_PHYS_ADDR_SPACE_BITS
32 -# error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h
33 -#endif
31 #ifndef TARGET_VIRT_ADDR_SPACE_BITS
32 # error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h
33 #endif
target/alpha/cpu-param.h
-3
@@ -8,9 +8,6 @@
8 #ifndef ALPHA_CPU_PARAM_H
9 #define ALPHA_CPU_PARAM_H
10
11 -/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 44
13 -
11 #ifdef CONFIG_USER_ONLY
12 /*
13 * Allow user-only to vary page size. Real hardware allows only 8k and 64k,
target/arm/cpu-param.h
-2
@@ -9,10 +9,8 @@
9 #define ARM_CPU_PARAM_H
10
11 #ifdef TARGET_AARCH64
12 -# define TARGET_PHYS_ADDR_SPACE_BITS 52
12 # define TARGET_VIRT_ADDR_SPACE_BITS 52
13 #else
15 -# define TARGET_PHYS_ADDR_SPACE_BITS 40
14 # define TARGET_VIRT_ADDR_SPACE_BITS 32
15 #endif
16
target/avr/cpu-param.h
-1
@@ -22,7 +22,6 @@
22 #define AVR_CPU_PARAM_H
23
24 #define TARGET_PAGE_BITS 10
25 -#define TARGET_PHYS_ADDR_SPACE_BITS 24
25 #define TARGET_VIRT_ADDR_SPACE_BITS 24
26
27 #endif
target/hexagon/cpu-param.h
-1
@@ -20,7 +20,6 @@
20
21 #define TARGET_PAGE_BITS 16 /* 64K pages */
22
23 -#define TARGET_PHYS_ADDR_SPACE_BITS 36
23 #define TARGET_VIRT_ADDR_SPACE_BITS 32
24
25 #endif
target/hppa/cpu-param.h
-3
@@ -9,11 +9,8 @@
9 #define HPPA_CPU_PARAM_H
10
11 #if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
12 -# define TARGET_PHYS_ADDR_SPACE_BITS 32
12 # define TARGET_VIRT_ADDR_SPACE_BITS 32
13 #else
15 -/* ??? PA-8000 through 8600 have 40 bits; PA-8700 and 8900 have 44 bits. */
16 -# define TARGET_PHYS_ADDR_SPACE_BITS 40
14 # define TARGET_VIRT_ADDR_SPACE_BITS 64
15 #endif
16
target/i386/cpu-param.h
-2
@@ -9,7 +9,6 @@
9 #define I386_CPU_PARAM_H
10
11 #ifdef TARGET_X86_64
12 -# define TARGET_PHYS_ADDR_SPACE_BITS 52
12 /*
13 * ??? This is really 48 bits, sign-extended, but the only thing
14 * accessible to userland with bit 48 set is the VSYSCALL, and that
@@ -17,7 +16,6 @@
16 */
17 # define TARGET_VIRT_ADDR_SPACE_BITS 47
18 #else
20 -# define TARGET_PHYS_ADDR_SPACE_BITS 36
19 # define TARGET_VIRT_ADDR_SPACE_BITS 32
20 #endif
21 #define TARGET_PAGE_BITS 12
target/loongarch/cpu-param.h
-1
@@ -8,7 +8,6 @@
8 #ifndef LOONGARCH_CPU_PARAM_H
9 #define LOONGARCH_CPU_PARAM_H
10
11 -#define TARGET_PHYS_ADDR_SPACE_BITS 48
11 #define TARGET_VIRT_ADDR_SPACE_BITS 48
12
13 #define TARGET_PAGE_BITS 12
target/m68k/cpu-param.h
-1
@@ -14,7 +14,6 @@
14 * use the smallest one
15 */
16 #define TARGET_PAGE_BITS 12
17 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
17 #define TARGET_VIRT_ADDR_SPACE_BITS 32
18
19 #endif
target/microblaze/cpu-param.h
-2
@@ -17,10 +17,8 @@
17 * of address space.
18 */
19 #ifdef CONFIG_USER_ONLY
20 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
20 #define TARGET_VIRT_ADDR_SPACE_BITS 32
21 #else
23 -#define TARGET_PHYS_ADDR_SPACE_BITS 64
22 #define TARGET_VIRT_ADDR_SPACE_BITS 64
23 #endif
24
target/mips/cpu-param.h
-2
@@ -8,10 +8,8 @@
8 #define MIPS_CPU_PARAM_H
9
10 #ifdef TARGET_ABI_MIPSN64
11 -#define TARGET_PHYS_ADDR_SPACE_BITS 48
11 #define TARGET_VIRT_ADDR_SPACE_BITS 48
12 #else
14 -#define TARGET_PHYS_ADDR_SPACE_BITS 40
13 # ifdef CONFIG_USER_ONLY
14 # define TARGET_VIRT_ADDR_SPACE_BITS 31
15 # else
target/or1k/cpu-param.h
-1
@@ -9,7 +9,6 @@
9 #define OPENRISC_CPU_PARAM_H
10
11 #define TARGET_PAGE_BITS 13
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
12 #define TARGET_VIRT_ADDR_SPACE_BITS 32
13
14 #endif
target/ppc/cpu-param.h
-7
@@ -9,12 +9,6 @@
9 #define PPC_CPU_PARAM_H
10
11 #ifdef TARGET_PPC64
12 -/*
13 - * Note that the official physical address space bits is 62-M where M
14 - * is implementation dependent. I've not looked up M for the set of
15 - * cpus we emulate at the system level.
16 - */
17 -#define TARGET_PHYS_ADDR_SPACE_BITS 62
12 /*
13 * Note that the PPC environment architecture talks about 80 bit virtual
14 * addresses, with segmentation. Obviously that's not all visible to a
@@ -26,7 +20,6 @@
20 # define TARGET_VIRT_ADDR_SPACE_BITS 64
21 # endif
22 #else
29 -# define TARGET_PHYS_ADDR_SPACE_BITS 36
23 # define TARGET_VIRT_ADDR_SPACE_BITS 32
24 #endif
25
target/riscv/cpu-param.h
-2
@@ -9,10 +9,8 @@
9 #define RISCV_CPU_PARAM_H
10
11 #if defined(TARGET_RISCV64)
12 -# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
12 # define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
13 #elif defined(TARGET_RISCV32)
15 -# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
14 # define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
15 #endif
16 #define TARGET_PAGE_BITS 12 /* 4 KiB Pages */
target/rx/cpu-param.h
-1
@@ -21,7 +21,6 @@
21
22 #define TARGET_PAGE_BITS 12
23
24 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
24 #define TARGET_VIRT_ADDR_SPACE_BITS 32
25
26 #endif
target/s390x/cpu-param.h
-1
@@ -9,7 +9,6 @@
9 #define S390_CPU_PARAM_H
10
11 #define TARGET_PAGE_BITS 12
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 64
12 #define TARGET_VIRT_ADDR_SPACE_BITS 64
13
14 #endif
target/sh4/cpu-param.h
-1
@@ -9,7 +9,6 @@
9 #define SH4_CPU_PARAM_H
10
11 #define TARGET_PAGE_BITS 12 /* 4k */
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
12 #ifdef CONFIG_USER_ONLY
13 # define TARGET_VIRT_ADDR_SPACE_BITS 31
14 #else
target/sparc/cpu-param.h
-2
@@ -9,7 +9,6 @@
9
10 #ifdef TARGET_SPARC64
11 # define TARGET_PAGE_BITS 13 /* 8k */
12 -# define TARGET_PHYS_ADDR_SPACE_BITS 41
12 # ifdef TARGET_ABI32
13 # define TARGET_VIRT_ADDR_SPACE_BITS 32
14 # else
@@ -17,7 +16,6 @@
16 # endif
17 #else
18 # define TARGET_PAGE_BITS 12 /* 4k */
20 -# define TARGET_PHYS_ADDR_SPACE_BITS 36
19 # define TARGET_VIRT_ADDR_SPACE_BITS 32
20 #endif
21
target/tricore/cpu-param.h
-1
@@ -9,7 +9,6 @@
9 #define TRICORE_CPU_PARAM_H
10
11 #define TARGET_PAGE_BITS 14
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
12 #define TARGET_VIRT_ADDR_SPACE_BITS 32
13
14 #endif
target/xtensa/cpu-param.h
-1
@@ -9,7 +9,6 @@
9 #define XTENSA_CPU_PARAM_H
10
11 #define TARGET_PAGE_BITS 12
12 -#define TARGET_PHYS_ADDR_SPACE_BITS 32
12 #ifdef CONFIG_USER_ONLY
13 #define TARGET_VIRT_ADDR_SPACE_BITS 30
14 #else