@samitouri / QOSamiQemu / commits / f443b68763

target/arm: Report IL=0 for Thumb 16-bit BKPT insn

The Thumb BKPT insn is 16-bit, and the ESR_ELx syndrome register definition requires that we set the IL bit to 0 for this, and 1 for the 32-bit A32 and A64 BKPT/BRK. We used to do this correctly, but accidentally lost it in the conversion to decodetree, because we converted the A32 BKPT first, and then when we converted the T16 BKPT we forgot that trans_BKPT() was unconditionally setting IL=1. Pass the right value for syn_aa32_bkpt()'s is_16bit argument. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3474 Fixes: 43f7e42c7d515f ("target/arm: Convert T16, Miscellaneous 16-bit instructions") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260505103726.419195-1-peter.maydell@linaro.org

Peter Maydell committed May 5, 2026 at 11:37 UTC f443b687636205b7f70029692b244f1f90532cf2

1 file changed +1 -1

target/arm/tcg/translate.c

+1 -1

@@ -3580,7 +3580,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)

3580 (a->imm == 0xab)) {

3581 gen_exception_internal_insn(s, EXCP_SEMIHOST);

3582 } else {

3583 - gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false));

3583 + gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, curr_insn_len(s) == 2));

3584 }

3585 return true;

3586 }