hw/arm/fsl-imx8mm: Adding support for I2C emulation
This can be used to test and debug I2C device drivers. Added I2C interrupts Reviewed-by: Philippe Mathieu-Daude <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gaurav Sharma committed
Apr 21, 2026 at 12:22 UTC
f774b5cf0ca7b6ad9607976912d26e77b7f0ca04
3 files changed
+37
hw/arm/Kconfig
+2
@@ -620,10 +620,12 @@ config FSL_IMX8MP_EVK
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config FSL_IMX8MM
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bool
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imply PCI_DEVICES
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+ imply I2C_DEVICES
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select ARM_GIC
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select FSL_IMX8MP_ANALOG
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select FSL_IMX8MP_CCM
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select IMX
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+ select IMX_I2C
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select SDHCI
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select PCI_EXPRESS_DESIGNWARE
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select PCI_EXPRESS_FSL_IMX8M_PHY
hw/arm/fsl-imx8mm.c
+27
@@ -180,6 +180,11 @@ static void fsl_imx8mm_init(Object *obj)
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object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);
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}
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+ for (i = 0; i < FSL_IMX8MM_NUM_I2CS; i++) {
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+ g_autofree char *name = g_strdup_printf("i2c%d", i + 1);
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+ object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C);
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+ }
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+
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for (i = 0; i < FSL_IMX8MM_NUM_GPIOS; i++) {
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g_autofree char *name = g_strdup_printf("gpio%d", i + 1);
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object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO);
@@ -370,6 +375,27 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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fsl_imx8mm_memmap[FSL_IMX8MM_OCRAM].addr,
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&s->ocram);
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+ /* I2Cs */
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+ for (i = 0; i < FSL_IMX8MM_NUM_I2CS; i++) {
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+ static const struct {
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+ hwaddr addr;
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+ unsigned int irq;
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+ } i2c_table[FSL_IMX8MM_NUM_I2CS] = {
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+ { fsl_imx8mm_memmap[FSL_IMX8MM_I2C1].addr, FSL_IMX8MM_I2C1_IRQ },
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+ { fsl_imx8mm_memmap[FSL_IMX8MM_I2C2].addr, FSL_IMX8MM_I2C2_IRQ },
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+ { fsl_imx8mm_memmap[FSL_IMX8MM_I2C3].addr, FSL_IMX8MM_I2C3_IRQ },
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+ { fsl_imx8mm_memmap[FSL_IMX8MM_I2C4].addr, FSL_IMX8MM_I2C4_IRQ },
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+ };
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+
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+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), errp)) {
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+ return;
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+ }
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+
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+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
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+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
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+ qdev_get_gpio_in(gicdev, i2c_table[i].irq));
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+ }
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+
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/* GPIOs */
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for (i = 0; i < FSL_IMX8MM_NUM_GPIOS; i++) {
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static const struct {
@@ -477,6 +503,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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case FSL_IMX8MM_GIC_DIST:
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case FSL_IMX8MM_GIC_REDIST:
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case FSL_IMX8MM_GPIO1 ... FSL_IMX8MM_GPIO5:
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+ case FSL_IMX8MM_I2C1 ... FSL_IMX8MM_I2C4:
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case FSL_IMX8MM_PCIE1:
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case FSL_IMX8MM_PCIE_PHY1:
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case FSL_IMX8MM_RAM:
include/hw/arm/fsl-imx8mm.h
+8
@@ -13,6 +13,7 @@
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#include "cpu.h"
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#include "hw/char/imx_serial.h"
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#include "hw/gpio/imx_gpio.h"
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+#include "hw/i2c/imx_i2c.h"
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#include "hw/intc/arm_gicv3_common.h"
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#include "hw/misc/imx7_snvs.h"
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#include "hw/misc/imx8mp_analog.h"
@@ -32,6 +33,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mmState, FSL_IMX8MM)
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enum FslImx8mmConfiguration {
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FSL_IMX8MM_NUM_CPUS = 4,
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FSL_IMX8MM_NUM_GPIOS = 5,
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+ FSL_IMX8MM_NUM_I2CS = 4,
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FSL_IMX8MM_NUM_IRQS = 128,
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FSL_IMX8MM_NUM_UARTS = 4,
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FSL_IMX8MM_NUM_USDHCS = 3,
@@ -46,6 +48,7 @@ struct FslImx8mmState {
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IMX8MPCCMState ccm;
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IMX8MPAnalogState analog;
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IMX7SNVSState snvs;
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+ IMXI2CState i2c[FSL_IMX8MM_NUM_I2CS];
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IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];
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MemoryRegion ocram;
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SDHCIState usdhc[FSL_IMX8MM_NUM_USDHCS];
@@ -174,6 +177,11 @@ enum FslImx8mmIrqs {
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FSL_IMX8MM_UART3_IRQ = 28,
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FSL_IMX8MM_UART4_IRQ = 29,
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+ FSL_IMX8MM_I2C1_IRQ = 35,
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+ FSL_IMX8MM_I2C2_IRQ = 36,
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+ FSL_IMX8MM_I2C3_IRQ = 37,
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+ FSL_IMX8MM_I2C4_IRQ = 38,
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+
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FSL_IMX8MM_GPIO1_LOW_IRQ = 64,
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FSL_IMX8MM_GPIO1_HIGH_IRQ = 65,
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FSL_IMX8MM_GPIO2_LOW_IRQ = 66,