@samitouri / QOSamiQemu / commits / f8d4df5475

target/riscv: remove riscv_cpu_named_features[]

This array has no uses left. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260512032926.1978818-8-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Daniel Henrique Barboza committed May 12, 2026 at 00:29 UTC f8d4df547594f7da94ebdb4ec5ddb759d65283e4
3 files changed +2 -29
target/riscv/cpu.c
-26
@@ -1411,32 +1411,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = {
1411 { },
1412 };
1413
1414 -/*
1415 - * 'Named features' is the name we give to extensions that we
1416 - * don't want to expose to users. They are either immutable
1417 - * (always enabled/disable) or they'll vary depending on
1418 - * the resulting CPU state.
1419 - *
1420 - * Some of them are always enabled depending on priv version
1421 - * of the CPU and are declared directly in isa_edata_arr[].
1422 - * The ones listed here have special checks during finalize()
1423 - * time and require their own flags like regular extensions.
1424 - * See riscv_cpu_update_named_features() for more info.
1425 - */
1426 -const RISCVCPUMultiExtConfig riscv_cpu_named_features[] = {
1427 - MULTI_EXT_CFG_BOOL("zic64b", ext_zic64b, true),
1428 - MULTI_EXT_CFG_BOOL("ssstateen", ext_ssstateen, true),
1429 - MULTI_EXT_CFG_BOOL("sha", ext_sha, true),
1430 -
1431 - /*
1432 - * 'ziccrse' has its own flag because the KVM driver
1433 - * wants to enable/disable it on its own accord.
1434 - */
1435 - MULTI_EXT_CFG_BOOL("ziccrse", ext_ziccrse, true),
1436 -
1437 - { },
1438 -};
1439 -
1414 static void cpu_set_prop_err(RISCVCPU *cpu, const char *propname,
1415 Error **errp)
1416 {
target/riscv/cpu.h
-1
@@ -992,7 +992,6 @@ typedef struct RISCVCPUMultiExtConfig {
992 extern const RISCVCPUMultiExtConfig riscv_cpu_extensions[];
993 extern const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[];
994 extern const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[];
995 -extern const RISCVCPUMultiExtConfig riscv_cpu_named_features[];
995
996 typedef struct isa_ext_data {
997 const char *name;
target/riscv/tcg/tcg-cpu.c
+2 -2
@@ -454,7 +454,7 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu)
454 }
455 }
456
457 -static void riscv_cpu_update_named_features(RISCVCPU *cpu)
457 +static void riscv_cpu_update_cfg(RISCVCPU *cpu)
458 {
459 if (cpu->env.priv_ver >= PRIV_VERSION_1_11_0) {
460 cpu->cfg.has_priv_1_11 = true;
@@ -1181,7 +1181,7 @@ void riscv_tcg_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
1181 return;
1182 }
1183
1184 - riscv_cpu_update_named_features(cpu);
1184 + riscv_cpu_update_cfg(cpu);
1185 riscv_cpu_validate_profiles(cpu);
1186
1187 if (cpu->cfg.ext_smepmp && !cpu->cfg.pmp) {