target/s390x: Have MSA helper pass a mmu_idx argument
Next commit will use the cpu_ld/st_mmu() API and thus will also use a @mmu_idx. In order to keep it simple to review, propate @mmu_idx in a preliminary step. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20260423135035.50126-8-philmd@linaro.org>
Philippe Mathieu-Daudé committed
Apr 23, 2026 at 12:25 UTC
fcc2699d41ede314e76c9f0fe5ddb5a1156620ae
1 file changed
+22
-19
target/s390x/tcg/crypto_helper.c
+22
-19
@@ -18,6 +18,7 @@
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#include "tcg_s390x.h"
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#include "exec/helper-proto.h"
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#include "accel/tcg/cpu-ldst.h"
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+#include "accel/tcg/cpu-mmu-index.h"
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static uint64_t R(uint64_t x, int c)
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{
@@ -119,8 +120,8 @@ static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
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sha512_bda(a, t);
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}
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-static void sha512_read_icv(CPUS390XState *env, uint64_t addr,
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- uint64_t a[8], uintptr_t ra)
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+static void sha512_read_icv(CPUS390XState *env, const int mmu_idx,
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+ uint64_t addr, uint64_t a[8], uintptr_t ra)
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{
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int i;
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@@ -130,8 +131,8 @@ static void sha512_read_icv(CPUS390XState *env, uint64_t addr,
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}
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}
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-static void sha512_write_ocv(CPUS390XState *env, uint64_t addr,
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- uint64_t a[8], uintptr_t ra)
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+static void sha512_write_ocv(CPUS390XState *env, const int mmu_idx,
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+ uint64_t addr, uint64_t a[8], uintptr_t ra)
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{
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int i;
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@@ -141,8 +142,8 @@ static void sha512_write_ocv(CPUS390XState *env, uint64_t addr,
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}
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}
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-static void sha512_read_block(CPUS390XState *env, uint64_t addr,
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- uint64_t a[16], uintptr_t ra)
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+static void sha512_read_block(CPUS390XState *env, const int mmu_idx,
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+ uint64_t addr, uint64_t a[16], uintptr_t ra)
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{
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int i;
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@@ -152,8 +153,8 @@ static void sha512_read_block(CPUS390XState *env, uint64_t addr,
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}
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}
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-static void sha512_read_mbl_be64(CPUS390XState *env, uint64_t addr,
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- uint8_t a[16], uintptr_t ra)
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+static void sha512_read_mbl_be64(CPUS390XState *env, const int mmu_idx,
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+ uint64_t addr, uint8_t a[16], uintptr_t ra)
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{
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int i;
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@@ -163,8 +164,9 @@ static void sha512_read_mbl_be64(CPUS390XState *env, uint64_t addr,
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}
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}
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-static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
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- uint64_t *message_reg, uint64_t *len_reg, uint32_t type)
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+static int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
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+ uint64_t param_addr, uint64_t *message_reg,
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+ uint64_t *len_reg, uint32_t type)
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{
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enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
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uint64_t len = *len_reg, a[8], processed = 0;
@@ -182,7 +184,7 @@ static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
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tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
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}
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- sha512_read_icv(env, param_addr, a, ra);
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+ sha512_read_icv(env, mmu_idx, param_addr, a, ra);
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/* Process full blocks first. */
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for (; len >= 128; len -= 128, processed += 128) {
@@ -192,7 +194,7 @@ static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
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break;
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}
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- sha512_read_block(env, *message_reg + processed, w, ra);
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+ sha512_read_block(env, mmu_idx, *message_reg + processed, w, ra);
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sha512_bda(a, w);
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}
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@@ -215,13 +217,13 @@ static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
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* or use an additional one.
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*/
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if (len < 112) {
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- sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
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+ sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
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}
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sha512_bda_be64(a, (uint64_t *)x);
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if (len >= 112) {
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memset(x, 0, 112);
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- sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
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+ sha512_read_mbl_be64(env, mmu_idx, param_addr + 64, x + 112, ra);
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sha512_bda_be64(a, (uint64_t *)x);
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}
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@@ -236,14 +238,14 @@ static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
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* TODO: if writing fails halfway through (e.g., when crossing page
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* boundaries), we're in trouble. We'd need something like access_prepare().
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*/
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- sha512_write_ocv(env, param_addr, a, ra);
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+ sha512_write_ocv(env, mmu_idx, param_addr, a, ra);
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*message_reg = deposit64(*message_reg, 0, message_reg_len,
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*message_reg + processed);
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*len_reg -= processed;
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return !len ? 0 : 3;
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}
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-static void fill_buf_random(CPUS390XState *env, uintptr_t ra,
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+static void fill_buf_random(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
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uint64_t *buf_reg, uint64_t *len_reg)
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{
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uint8_t tmp[256];
@@ -271,6 +273,7 @@ static void fill_buf_random(CPUS390XState *env, uintptr_t ra,
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uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
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uint32_t type)
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{
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+ const int mmu_idx = cpu_mmu_index(env_cpu(env), false);
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const uintptr_t ra = GETPC();
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const uint8_t mod = env->regs[0] & 0x80ULL;
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const uint8_t fc = env->regs[0] & 0x7fULL;
@@ -303,11 +306,11 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
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}
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break;
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case 3: /* CPACF_*_SHA_512 */
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- return cpacf_sha512(env, ra, env->regs[1], &env->regs[r2],
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+ return cpacf_sha512(env, mmu_idx, ra, env->regs[1], &env->regs[r2],
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&env->regs[r2 + 1], type);
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case 114: /* CPACF_PRNO_TRNG */
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- fill_buf_random(env, ra, &env->regs[r1], &env->regs[r1 + 1]);
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- fill_buf_random(env, ra, &env->regs[r2], &env->regs[r2 + 1]);
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+ fill_buf_random(env, mmu_idx, ra, &env->regs[r1], &env->regs[r1 + 1]);
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+ fill_buf_random(env, mmu_idx, ra, &env->regs[r2], &env->regs[r2 + 1]);
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break;
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default:
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/* we don't implement any other subfunction yet */