target/sparc: Expose gdbstub registers to sparc32 targets
Import gdb-xml/sparc32-{cpu,fpu,cp0}.xml from mainstream binutils, tag 'binutils-2_46', found in the gdb/features/sparc/folder [*]. Register them by setting the CPUClass::gdb_core_xml_file field and calling gdb_register_coprocessor() in sparc_cpu_register_gdb_regs(). [*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46 Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260219191955.83815-16-philmd@linaro.org>
Philippe Mathieu-Daudé committed
Feb 15, 2026 at 02:51 UTC
fe1958cdb697435966ef66eb3507366edbb2e50e
7 files changed
+113
-6
configs/targets/sparc-linux-user.mak
+1
@@ -2,5 +2,6 @@ TARGET_ARCH=sparc
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TARGET_SYSTBL_ABI=common,32
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TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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+TARGET_XML_FILES=gdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml/sparc32-cp0.xml
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TARGET_LONG_BITS=32
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TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
configs/targets/sparc-softmmu.mak
+1
@@ -1,5 +1,6 @@
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TARGET_ARCH=sparc
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TARGET_BIG_ENDIAN=y
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+TARGET_XML_FILES=gdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml/sparc32-cp0.xml
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TARGET_LONG_BITS=32
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TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
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TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
gdb-xml/sparc32-cp0.xml
new
+18
@@ -0,0 +1,18 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.sparc.cp0">
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+ <reg name="y" bitsize="32" type="uint32" regnum="64"/>
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+ <reg name="psr" bitsize="32" type="uint32" regnum="65"/>
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+ <reg name="wim" bitsize="32" type="uint32" regnum="66"/>
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+ <reg name="tbr" bitsize="32" type="uint32" regnum="67"/>
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+ <reg name="pc" bitsize="32" type="code_ptr" regnum="68"/>
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+ <reg name="npc" bitsize="32" type="code_ptr" regnum="69"/>
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+ <reg name="fsr" bitsize="32" type="uint32" regnum="70"/>
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+ <reg name="csr" bitsize="32" type="uint32" regnum="71"/>
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+</feature>
gdb-xml/sparc32-cpu.xml
new
+42
@@ -0,0 +1,42 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.sparc.cpu">
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+ <reg name="g0" bitsize="32" type="uint32" regnum="0"/>
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+ <reg name="g1" bitsize="32" type="uint32" regnum="1"/>
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+ <reg name="g2" bitsize="32" type="uint32" regnum="2"/>
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+ <reg name="g3" bitsize="32" type="uint32" regnum="3"/>
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+ <reg name="g4" bitsize="32" type="uint32" regnum="4"/>
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+ <reg name="g5" bitsize="32" type="uint32" regnum="5"/>
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+ <reg name="g6" bitsize="32" type="uint32" regnum="6"/>
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+ <reg name="g7" bitsize="32" type="uint32" regnum="7"/>
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+ <reg name="o0" bitsize="32" type="uint32" regnum="8"/>
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+ <reg name="o1" bitsize="32" type="uint32" regnum="9"/>
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+ <reg name="o2" bitsize="32" type="uint32" regnum="10"/>
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+ <reg name="o3" bitsize="32" type="uint32" regnum="11"/>
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+ <reg name="o4" bitsize="32" type="uint32" regnum="12"/>
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+ <reg name="o5" bitsize="32" type="uint32" regnum="13"/>
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+ <reg name="sp" bitsize="32" type="uint32" regnum="14"/>
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+ <reg name="o7" bitsize="32" type="uint32" regnum="15"/>
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+ <reg name="l0" bitsize="32" type="uint32" regnum="16"/>
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+ <reg name="l1" bitsize="32" type="uint32" regnum="17"/>
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+ <reg name="l2" bitsize="32" type="uint32" regnum="18"/>
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+ <reg name="l3" bitsize="32" type="uint32" regnum="19"/>
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+ <reg name="l4" bitsize="32" type="uint32" regnum="20"/>
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+ <reg name="l5" bitsize="32" type="uint32" regnum="21"/>
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+ <reg name="l6" bitsize="32" type="uint32" regnum="22"/>
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+ <reg name="l7" bitsize="32" type="uint32" regnum="23"/>
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+ <reg name="i0" bitsize="32" type="uint32" regnum="24"/>
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+ <reg name="i1" bitsize="32" type="uint32" regnum="25"/>
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+ <reg name="i2" bitsize="32" type="uint32" regnum="26"/>
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+ <reg name="i3" bitsize="32" type="uint32" regnum="27"/>
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+ <reg name="i4" bitsize="32" type="uint32" regnum="28"/>
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+ <reg name="i5" bitsize="32" type="uint32" regnum="29"/>
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+ <reg name="fp" bitsize="32" type="uint32" regnum="30"/>
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+ <reg name="i7" bitsize="32" type="uint32" regnum="31"/>
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+</feature>
gdb-xml/sparc32-fpu.xml
new
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@@ -0,0 +1,42 @@
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+<?xml version="1.0"?>
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+<!-- Copyright (C) 2013-2026 Free Software Foundation, Inc.
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+
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+ Copying and distribution of this file, with or without modification,
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+ are permitted in any medium without royalty provided the copyright
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+ notice and this notice are preserved. -->
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+
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+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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+<feature name="org.gnu.gdb.sparc.fpu">
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+ <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
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+ <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
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+ <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
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+ <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
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+ <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
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+ <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
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+ <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
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+ <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
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+ <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
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+ <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
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+ <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
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+ <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
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+ <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
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+ <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
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+ <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
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+ <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
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+ <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
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+ <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
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+ <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
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+ <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
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+ <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
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+ <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
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+ <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
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+ <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
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+ <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
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+ <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
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+ <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
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+ <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
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+ <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
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+ <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
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+ <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
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+ <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
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+</feature>
target/sparc/cpu.c
+1
-1
@@ -1095,7 +1095,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
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cc->gdb_core_xml_file = "sparc64-cpu.xml";
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#else
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- cc->gdb_num_core_regs = 72;
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+ cc->gdb_core_xml_file = "sparc32-cpu.xml";
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#endif
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cc->tcg_ops = &sparc_tcg_ops;
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}
target/sparc/gdbstub.c
+8
-5
@@ -43,7 +43,6 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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return 0;
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}
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-__attribute__((unused))
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static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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CPUSPARCState *env = cpu_env(cs);
@@ -79,7 +78,6 @@ static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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return 0;
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}
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-__attribute__((unused))
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static int sparc_cp0_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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CPUSPARCState *env = cpu_env(cs);
@@ -154,7 +152,6 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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#endif
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}
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-__attribute__((unused))
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static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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CPUSPARCState *env = cpu_env(cs);
@@ -197,7 +194,6 @@ static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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#endif
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}
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-__attribute__((unused))
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static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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CPUSPARCState *env = cpu_env(cs);
@@ -271,7 +267,14 @@ static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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void sparc_cpu_register_gdb_regs(CPUState *cs)
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{
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#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
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- /* Not yet supported */
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+ gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
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+ sparc_fpu_gdb_write_register,
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+ gdb_find_static_feature("sparc32-fpu.xml"),
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+ 0);
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+ gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register,
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+ sparc_cp0_gdb_write_register,
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+ gdb_find_static_feature("sparc32-cp0.xml"),
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+ 0);
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#else
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gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register,
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sparc_fpu_gdb_write_register,