| 1 | // SPDX-License-Identifier: Apache-2.0 |
| 2 | // SPDX-FileCopyrightText: Copyright contributors to the vLLM project |
| 3 | |
| 4 | #ifndef CPU_MICRO_GEMM_NEON_HPP |
| 5 | #define CPU_MICRO_GEMM_NEON_HPP |
| 6 | |
| 7 | #include <algorithm> |
| 8 | #include <cstdint> |
| 9 | |
| 10 | #include "cpu/micro_gemm/cpu_micro_gemm_impl.hpp" |
| 11 | |
| 12 | #include <arm_bf16.h> |
| 13 | #include <arm_neon.h> |
| 14 | |
| 15 | namespace cpu_micro_gemm { |
| 16 | |
| 17 | namespace { |
| 18 | |
| 19 | constexpr int32_t K = 4; |
| 20 | constexpr int32_t Cols = 2; |
| 21 | constexpr int32_t TileSize = K * Cols; |
| 22 | |
| 23 | // a = [a0, a1, a2, a3], b = [b0, b1, b2, b3] -> [a0, a1, b0, b1] |
| 24 | FORCE_INLINE float32x4_t zip1_f32x4(const float32x4_t a, const float32x4_t b) { |
| 25 | return vreinterpretq_f32_f64( |
| 26 | vzip1q_f64(vreinterpretq_f64_f32(a), vreinterpretq_f64_f32(b))); |
| 27 | } |
| 28 | |
| 29 | // a = [a0, a1, a2, a3], b = [b0, b1, b2, b3] -> [a2, a3, b2, b3] |
| 30 | FORCE_INLINE float32x4_t zip2_f32x4(const float32x4_t a, const float32x4_t b) { |
| 31 | return vreinterpretq_f32_f64( |
| 32 | vzip2q_f64(vreinterpretq_f64_f32(a), vreinterpretq_f64_f32(b))); |
| 33 | } |
| 34 | |
| 35 | FORCE_INLINE void init_acc_rowpair(float32x4_t& acc01, float32x4_t& acc23, |
| 36 | float32x4_t& acc45, float32x4_t& acc67, |
| 37 | const float* __restrict__ c_ptr, |
| 38 | const int64_t ldc, const int32_t m_rows, |
| 39 | const bool accum_c) { |
| 40 | if (!accum_c || m_rows == 0) { |
| 41 | acc01 = vdupq_n_f32(0.0f); |
| 42 | acc23 = vdupq_n_f32(0.0f); |
| 43 | acc45 = vdupq_n_f32(0.0f); |
| 44 | acc67 = vdupq_n_f32(0.0f); |
| 45 | return; |
| 46 | } |
| 47 | |
| 48 | const float32x4_t row0_0123 = vld1q_f32(c_ptr); |
| 49 | const float32x4_t row0_4567 = vld1q_f32(c_ptr + 4); |
| 50 | const float32x4_t row1_0123 = |
| 51 | (m_rows == 2) ? vld1q_f32(c_ptr + ldc) : vdupq_n_f32(0.0f); |
| 52 | const float32x4_t row1_4567 = |
| 53 | (m_rows == 2) ? vld1q_f32(c_ptr + ldc + 4) : vdupq_n_f32(0.0f); |
| 54 | |
| 55 | acc01 = zip1_f32x4(row0_0123, row1_0123); |
| 56 | acc23 = zip2_f32x4(row0_0123, row1_0123); |
| 57 | acc45 = zip1_f32x4(row0_4567, row1_4567); |
| 58 | acc67 = zip2_f32x4(row0_4567, row1_4567); |
| 59 | } |
| 60 | |
| 61 | FORCE_INLINE void store_acc_rowpair(const float32x4_t acc01, |
| 62 | const float32x4_t acc23, |
| 63 | const float32x4_t acc45, |
| 64 | const float32x4_t acc67, |
| 65 | float* __restrict__ c_ptr, |
| 66 | const int64_t ldc, const int32_t m_rows) { |
| 67 | if (m_rows == 0) { |
| 68 | return; |
| 69 | } |
| 70 | |
| 71 | vst1q_f32(c_ptr, zip1_f32x4(acc01, acc23)); |
| 72 | vst1q_f32(c_ptr + 4, zip1_f32x4(acc45, acc67)); |
| 73 | |
| 74 | if (m_rows == 2) { |
| 75 | vst1q_f32(c_ptr + ldc, zip2_f32x4(acc01, acc23)); |
| 76 | vst1q_f32(c_ptr + ldc + 4, zip2_f32x4(acc45, acc67)); |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | FORCE_INLINE void gemm_micro_bfmmla_8x8_packed_a( |
| 81 | const bfloat16_t* __restrict__ a_packed, |
| 82 | const bfloat16_t* __restrict__ b_packed, float* __restrict__ c_ptr, |
| 83 | const int32_t m, const int32_t k_size, const int64_t ldc, |
| 84 | const bool accum_c) { |
| 85 | float32x4_t acc0101, acc0123, acc0145, acc0167; |
| 86 | float32x4_t acc2301, acc2323, acc2345, acc2367; |
| 87 | float32x4_t acc4501, acc4523, acc4545, acc4567; |
| 88 | float32x4_t acc6701, acc6723, acc6745, acc6767; |
| 89 | |
| 90 | init_acc_rowpair(acc0101, acc0123, acc0145, acc0167, c_ptr, ldc, |
| 91 | std::min(2, m), accum_c); |
| 92 | init_acc_rowpair(acc2301, acc2323, acc2345, acc2367, c_ptr + 2 * ldc, ldc, |
| 93 | std::min(2, std::max(0, m - 2)), accum_c); |
| 94 | init_acc_rowpair(acc4501, acc4523, acc4545, acc4567, c_ptr + 4 * ldc, ldc, |
| 95 | std::min(2, std::max(0, m - 4)), accum_c); |
| 96 | init_acc_rowpair(acc6701, acc6723, acc6745, acc6767, c_ptr + 6 * ldc, ldc, |
| 97 | std::min(2, std::max(0, m - 6)), accum_c); |
| 98 | |
| 99 | const bfloat16_t* __restrict__ a_tile = a_packed; |
| 100 | const bfloat16_t* __restrict__ b_tile = b_packed; |
| 101 | |
| 102 | #pragma GCC unroll 8 |
| 103 | for (int32_t k_idx = 0; k_idx < k_size; k_idx += K) { |
| 104 | const bfloat16x8_t a_tile01 = vld1q_bf16(a_tile); |
| 105 | const bfloat16x8_t a_tile23 = vld1q_bf16(a_tile + TileSize); |
| 106 | const bfloat16x8_t a_tile45 = vld1q_bf16(a_tile + 2 * TileSize); |
| 107 | const bfloat16x8_t a_tile67 = vld1q_bf16(a_tile + 3 * TileSize); |
| 108 | |
| 109 | const bfloat16x8_t b_tile01 = vld1q_bf16(b_tile); |
| 110 | const bfloat16x8_t b_tile23 = vld1q_bf16(b_tile + TileSize); |
| 111 | const bfloat16x8_t b_tile45 = vld1q_bf16(b_tile + 2 * TileSize); |
| 112 | const bfloat16x8_t b_tile67 = vld1q_bf16(b_tile + 3 * TileSize); |
| 113 | |
| 114 | acc0101 = vbfmmlaq_f32(acc0101, a_tile01, b_tile01); |
| 115 | acc2301 = vbfmmlaq_f32(acc2301, a_tile23, b_tile01); |
| 116 | acc4501 = vbfmmlaq_f32(acc4501, a_tile45, b_tile01); |
| 117 | acc6701 = vbfmmlaq_f32(acc6701, a_tile67, b_tile01); |
| 118 | |
| 119 | acc0123 = vbfmmlaq_f32(acc0123, a_tile01, b_tile23); |
| 120 | acc2323 = vbfmmlaq_f32(acc2323, a_tile23, b_tile23); |
| 121 | acc4523 = vbfmmlaq_f32(acc4523, a_tile45, b_tile23); |
| 122 | acc6723 = vbfmmlaq_f32(acc6723, a_tile67, b_tile23); |
| 123 | |
| 124 | acc0145 = vbfmmlaq_f32(acc0145, a_tile01, b_tile45); |
| 125 | acc2345 = vbfmmlaq_f32(acc2345, a_tile23, b_tile45); |
| 126 | acc4545 = vbfmmlaq_f32(acc4545, a_tile45, b_tile45); |
| 127 | acc6745 = vbfmmlaq_f32(acc6745, a_tile67, b_tile45); |
| 128 | |
| 129 | acc0167 = vbfmmlaq_f32(acc0167, a_tile01, b_tile67); |
| 130 | acc2367 = vbfmmlaq_f32(acc2367, a_tile23, b_tile67); |
| 131 | acc4567 = vbfmmlaq_f32(acc4567, a_tile45, b_tile67); |
| 132 | acc6767 = vbfmmlaq_f32(acc6767, a_tile67, b_tile67); |
| 133 | |
| 134 | a_tile += 4 * TileSize; |
| 135 | b_tile += 4 * TileSize; |
| 136 | } |
| 137 | |
| 138 | store_acc_rowpair(acc0101, acc0123, acc0145, acc0167, c_ptr, ldc, |
| 139 | std::min(2, m)); |
| 140 | store_acc_rowpair(acc2301, acc2323, acc2345, acc2367, c_ptr + 2 * ldc, ldc, |
| 141 | std::min(2, std::max(0, m - 2))); |
| 142 | store_acc_rowpair(acc4501, acc4523, acc4545, acc4567, c_ptr + 4 * ldc, ldc, |
| 143 | std::min(2, std::max(0, m - 4))); |
| 144 | store_acc_rowpair(acc6701, acc6723, acc6745, acc6767, c_ptr + 6 * ldc, ldc, |
| 145 | std::min(2, std::max(0, m - 6))); |
| 146 | } |
| 147 | |
| 148 | FORCE_INLINE void gemm_micro_bfmmla_4x16_packed_a( |
| 149 | const bfloat16_t* __restrict__ a_packed, |
| 150 | const bfloat16_t* __restrict__ b_packed, float* __restrict__ c_ptr, |
| 151 | const int32_t m, const int32_t k_size, const int64_t b_n_group_stride, |
| 152 | const int64_t ldc, const bool accum_c) { |
| 153 | const int32_t m_rows_01 = std::min(2, m); |
| 154 | const int32_t m_rows_23 = std::min(2, std::max(0, m - 2)); |
| 155 | |
| 156 | float32x4_t acc0101, acc0123, acc0145, acc0167; |
| 157 | float32x4_t acc2301, acc2323, acc2345, acc2367; |
| 158 | float32x4_t acc0189, acc011011, acc011213, acc011415; |
| 159 | float32x4_t acc2389, acc231011, acc231213, acc231415; |
| 160 | |
| 161 | init_acc_rowpair(acc0101, acc0123, acc0145, acc0167, c_ptr, ldc, m_rows_01, |
| 162 | accum_c); |
| 163 | init_acc_rowpair(acc2301, acc2323, acc2345, acc2367, c_ptr + 2 * ldc, ldc, |
| 164 | m_rows_23, accum_c); |
| 165 | init_acc_rowpair(acc0189, acc011011, acc011213, acc011415, c_ptr + 8, ldc, |
| 166 | m_rows_01, accum_c); |
| 167 | init_acc_rowpair(acc2389, acc231011, acc231213, acc231415, |
| 168 | c_ptr + 2 * ldc + 8, ldc, m_rows_23, accum_c); |
| 169 | |
| 170 | const bfloat16_t* __restrict__ a_tile = a_packed; |
| 171 | const bfloat16_t* __restrict__ b_tile0 = b_packed; |
| 172 | const bfloat16_t* __restrict__ b_tile1 = b_packed + b_n_group_stride; |
| 173 | |
| 174 | #pragma GCC unroll 8 |
| 175 | for (int32_t k_idx = 0; k_idx < k_size; k_idx += K) { |
| 176 | const bfloat16x8_t a_tile01 = vld1q_bf16(a_tile); |
| 177 | const bfloat16x8_t a_tile23 = vld1q_bf16(a_tile + TileSize); |
| 178 | const bfloat16x8_t b_tile01 = vld1q_bf16(b_tile0); |
| 179 | const bfloat16x8_t b_tile23 = vld1q_bf16(b_tile0 + TileSize); |
| 180 | const bfloat16x8_t b_tile45 = vld1q_bf16(b_tile0 + 2 * TileSize); |
| 181 | const bfloat16x8_t b_tile67 = vld1q_bf16(b_tile0 + 3 * TileSize); |
| 182 | const bfloat16x8_t b_tile89 = vld1q_bf16(b_tile1); |
| 183 | const bfloat16x8_t b_tile1011 = vld1q_bf16(b_tile1 + TileSize); |
| 184 | const bfloat16x8_t b_tile1213 = vld1q_bf16(b_tile1 + 2 * TileSize); |
| 185 | const bfloat16x8_t b_tile1415 = vld1q_bf16(b_tile1 + 3 * TileSize); |
| 186 | |
| 187 | acc0101 = vbfmmlaq_f32(acc0101, a_tile01, b_tile01); |
| 188 | acc2301 = vbfmmlaq_f32(acc2301, a_tile23, b_tile01); |
| 189 | acc0123 = vbfmmlaq_f32(acc0123, a_tile01, b_tile23); |
| 190 | acc2323 = vbfmmlaq_f32(acc2323, a_tile23, b_tile23); |
| 191 | |
| 192 | acc0145 = vbfmmlaq_f32(acc0145, a_tile01, b_tile45); |
| 193 | acc2345 = vbfmmlaq_f32(acc2345, a_tile23, b_tile45); |
| 194 | acc0167 = vbfmmlaq_f32(acc0167, a_tile01, b_tile67); |
| 195 | acc2367 = vbfmmlaq_f32(acc2367, a_tile23, b_tile67); |
| 196 | |
| 197 | acc0189 = vbfmmlaq_f32(acc0189, a_tile01, b_tile89); |
| 198 | acc2389 = vbfmmlaq_f32(acc2389, a_tile23, b_tile89); |
| 199 | acc011011 = vbfmmlaq_f32(acc011011, a_tile01, b_tile1011); |
| 200 | acc231011 = vbfmmlaq_f32(acc231011, a_tile23, b_tile1011); |
| 201 | |
| 202 | acc011213 = vbfmmlaq_f32(acc011213, a_tile01, b_tile1213); |
| 203 | acc231213 = vbfmmlaq_f32(acc231213, a_tile23, b_tile1213); |
| 204 | acc011415 = vbfmmlaq_f32(acc011415, a_tile01, b_tile1415); |
| 205 | acc231415 = vbfmmlaq_f32(acc231415, a_tile23, b_tile1415); |
| 206 | |
| 207 | a_tile += 2 * TileSize; |
| 208 | b_tile0 += 4 * TileSize; |
| 209 | b_tile1 += 4 * TileSize; |
| 210 | } |
| 211 | |
| 212 | store_acc_rowpair(acc0101, acc0123, acc0145, acc0167, c_ptr, ldc, m_rows_01); |
| 213 | store_acc_rowpair(acc2301, acc2323, acc2345, acc2367, c_ptr + 2 * ldc, ldc, |
| 214 | m_rows_23); |
| 215 | store_acc_rowpair(acc0189, acc011011, acc011213, acc011415, c_ptr + 8, ldc, |
| 216 | m_rows_01); |
| 217 | store_acc_rowpair(acc2389, acc231011, acc231213, acc231415, |
| 218 | c_ptr + 2 * ldc + 8, ldc, m_rows_23); |
| 219 | } |
| 220 | |
| 221 | } // namespace |
| 222 | |
| 223 | template <typename scalar_t> |
| 224 | class MicroGemm<cpu_utils::ISA::NEON, scalar_t> { |
| 225 | public: |
| 226 | static constexpr int32_t Mr = 8; |
| 227 | static constexpr int32_t Nr = 8; |
| 228 | static constexpr int32_t NrGemv = 16; |
| 229 | static constexpr int32_t MaxMSize = 8; |
| 230 | static constexpr int32_t NSize = 32; |
| 231 | static constexpr int32_t WeightOCGroupSize = Nr; |
| 232 | static constexpr bool PackA = false; |
| 233 | |
| 234 | public: |
| 235 | void gemm(DEFINE_CPU_MICRO_GEMM_PARAMS) { |
| 236 | TORCH_CHECK(false, "NEON BFMMLA MicroGemm only supports bfloat16."); |
| 237 | } |
| 238 | |
| 239 | static void pack_weight(const scalar_t* __restrict__ /*weight*/, |
| 240 | scalar_t* __restrict__ /*packed_weight*/, |
| 241 | const int32_t /*output_size*/, |
| 242 | const int32_t /*input_size*/) { |
| 243 | TORCH_CHECK(false, "NEON BFMMLA MicroGemm only supports bfloat16."); |
| 244 | } |
| 245 | }; |
| 246 | |
| 247 | template <> |
| 248 | class MicroGemm<cpu_utils::ISA::NEON, c10::BFloat16> { |
| 249 | public: |
| 250 | using scalar_t = c10::BFloat16; |
| 251 | |
| 252 | static constexpr int32_t Mr = 8; |
| 253 | static constexpr int32_t Nr = 8; |
| 254 | static constexpr int32_t NrGemv = 16; |
| 255 | static constexpr int32_t MaxMSize = 8; |
| 256 | static constexpr int32_t NSize = 32; |
| 257 | static constexpr int32_t WeightOCGroupSize = Nr; |
| 258 | static constexpr bool PackA = true; |
| 259 | |
| 260 | public: |
| 261 | // physical layout [ |
| 262 | // M / (8 or 4); Mr is 8 or 4 |
| 263 | // K / 4; K for bfmmla is 4 |
| 264 | // 4, ; 4 row-pairs for each 8 rows |
| 265 | // 2, ; row-pair is 2 rows |
| 266 | // 4 ; 4 elements per row |
| 267 | // ] |
| 268 | |
| 269 | static void pack_input_from_rows(const scalar_t* const* __restrict__ rows, |
| 270 | scalar_t* __restrict__ a_packed, |
| 271 | const int32_t m, const int32_t k) { |
| 272 | TORCH_CHECK(m > 0 && m <= MaxMSize); |
| 273 | TORCH_CHECK_EQ(k % K, 0); |
| 274 | |
| 275 | auto* __restrict__ out = reinterpret_cast<bfloat16_t*>(a_packed); |
| 276 | const bfloat16x8_t zero_q = vdupq_n_bf16(bfloat16_t{}); |
| 277 | const bfloat16x4_t zero = vget_low_bf16(zero_q); |
| 278 | |
| 279 | for (int32_t row_base = 0; row_base < m; row_base += Mr) { |
| 280 | const int32_t actual_m = std::min(Mr, m - row_base); |
| 281 | const bfloat16_t* __restrict__ row[Mr]; |
| 282 | for (int32_t i = 0; i < actual_m; ++i) { |
| 283 | row[i] = reinterpret_cast<const bfloat16_t*>(rows[row_base + i]); |
| 284 | } |
| 285 | |
| 286 | if (actual_m == 8) { |
| 287 | int32_t k_idx = 0; |
| 288 | for (; k_idx + 8 <= k; k_idx += 8) { |
| 289 | bfloat16_t* __restrict__ block0 = out; |
| 290 | bfloat16_t* __restrict__ block1 = out + 4 * TileSize; |
| 291 | |
| 292 | bfloat16x8_t a0 = vld1q_bf16(row[0] + k_idx); |
| 293 | bfloat16x8_t a1 = vld1q_bf16(row[1] + k_idx); |
| 294 | vst1q_bf16(block0, |
| 295 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 296 | vst1q_bf16(block1, |
| 297 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 298 | |
| 299 | a0 = vld1q_bf16(row[2] + k_idx); |
| 300 | a1 = vld1q_bf16(row[3] + k_idx); |
| 301 | vst1q_bf16(block0 + TileSize, |
| 302 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 303 | vst1q_bf16(block1 + TileSize, |
| 304 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 305 | |
| 306 | a0 = vld1q_bf16(row[4] + k_idx); |
| 307 | a1 = vld1q_bf16(row[5] + k_idx); |
| 308 | vst1q_bf16(block0 + 2 * TileSize, |
| 309 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 310 | vst1q_bf16(block1 + 2 * TileSize, |
| 311 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 312 | |
| 313 | a0 = vld1q_bf16(row[6] + k_idx); |
| 314 | a1 = vld1q_bf16(row[7] + k_idx); |
| 315 | vst1q_bf16(block0 + 3 * TileSize, |
| 316 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 317 | vst1q_bf16(block1 + 3 * TileSize, |
| 318 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 319 | |
| 320 | out += 8 * TileSize; |
| 321 | } |
| 322 | |
| 323 | for (; k_idx < k; k_idx += K) { |
| 324 | bfloat16x4_t a0 = vld1_bf16(row[0] + k_idx); |
| 325 | bfloat16x4_t a1 = vld1_bf16(row[1] + k_idx); |
| 326 | vst1q_bf16(out, vcombine_bf16(a0, a1)); |
| 327 | |
| 328 | a0 = vld1_bf16(row[2] + k_idx); |
| 329 | a1 = vld1_bf16(row[3] + k_idx); |
| 330 | vst1q_bf16(out + TileSize, vcombine_bf16(a0, a1)); |
| 331 | |
| 332 | a0 = vld1_bf16(row[4] + k_idx); |
| 333 | a1 = vld1_bf16(row[5] + k_idx); |
| 334 | vst1q_bf16(out + 2 * TileSize, vcombine_bf16(a0, a1)); |
| 335 | |
| 336 | a0 = vld1_bf16(row[6] + k_idx); |
| 337 | a1 = vld1_bf16(row[7] + k_idx); |
| 338 | vst1q_bf16(out + 3 * TileSize, vcombine_bf16(a0, a1)); |
| 339 | |
| 340 | out += 4 * TileSize; |
| 341 | } |
| 342 | continue; |
| 343 | } |
| 344 | |
| 345 | if (actual_m == 4) { |
| 346 | int32_t k_idx = 0; |
| 347 | for (; k_idx + 8 <= k; k_idx += 8) { |
| 348 | bfloat16_t* __restrict__ block0 = out; |
| 349 | bfloat16_t* __restrict__ block1 = out + 2 * TileSize; |
| 350 | |
| 351 | bfloat16x8_t a0 = vld1q_bf16(row[0] + k_idx); |
| 352 | bfloat16x8_t a1 = vld1q_bf16(row[1] + k_idx); |
| 353 | vst1q_bf16(block0, |
| 354 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 355 | vst1q_bf16(block1, |
| 356 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 357 | |
| 358 | a0 = vld1q_bf16(row[2] + k_idx); |
| 359 | a1 = vld1q_bf16(row[3] + k_idx); |
| 360 | vst1q_bf16(block0 + TileSize, |
| 361 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 362 | vst1q_bf16(block1 + TileSize, |
| 363 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 364 | |
| 365 | out += 4 * TileSize; |
| 366 | } |
| 367 | |
| 368 | for (; k_idx < k; k_idx += K) { |
| 369 | bfloat16x4_t a0 = vld1_bf16(row[0] + k_idx); |
| 370 | bfloat16x4_t a1 = vld1_bf16(row[1] + k_idx); |
| 371 | vst1q_bf16(out, vcombine_bf16(a0, a1)); |
| 372 | |
| 373 | a0 = vld1_bf16(row[2] + k_idx); |
| 374 | a1 = vld1_bf16(row[3] + k_idx); |
| 375 | vst1q_bf16(out + TileSize, vcombine_bf16(a0, a1)); |
| 376 | |
| 377 | out += 2 * TileSize; |
| 378 | } |
| 379 | continue; |
| 380 | } |
| 381 | |
| 382 | const int32_t row_pair_count = (actual_m <= 4) ? 2 : Mr / 2; |
| 383 | |
| 384 | int32_t k_idx = 0; |
| 385 | for (; k_idx + 8 <= k; k_idx += 8) { |
| 386 | bfloat16_t* __restrict__ block0 = out; |
| 387 | bfloat16_t* __restrict__ block1 = out + row_pair_count * TileSize; |
| 388 | |
| 389 | bfloat16x8_t a0 = vld1q_bf16(row[0] + k_idx); |
| 390 | bfloat16x8_t a1 = (actual_m > 1) ? vld1q_bf16(row[1] + k_idx) : zero_q; |
| 391 | vst1q_bf16(block0, vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 392 | vst1q_bf16(block1, |
| 393 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 394 | |
| 395 | a0 = (actual_m > 2) ? vld1q_bf16(row[2] + k_idx) : zero_q; |
| 396 | a1 = (actual_m > 3) ? vld1q_bf16(row[3] + k_idx) : zero_q; |
| 397 | vst1q_bf16(block0 + TileSize, |
| 398 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 399 | vst1q_bf16(block1 + TileSize, |
| 400 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 401 | |
| 402 | if (actual_m > 4) { |
| 403 | a0 = vld1q_bf16(row[4] + k_idx); |
| 404 | a1 = (actual_m > 5) ? vld1q_bf16(row[5] + k_idx) : zero_q; |
| 405 | vst1q_bf16(block0 + 2 * TileSize, |
| 406 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 407 | vst1q_bf16(block1 + 2 * TileSize, |
| 408 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 409 | |
| 410 | a0 = (actual_m > 6) ? vld1q_bf16(row[6] + k_idx) : zero_q; |
| 411 | a1 = (actual_m > 7) ? vld1q_bf16(row[7] + k_idx) : zero_q; |
| 412 | vst1q_bf16(block0 + 3 * TileSize, |
| 413 | vcombine_bf16(vget_low_bf16(a0), vget_low_bf16(a1))); |
| 414 | vst1q_bf16(block1 + 3 * TileSize, |
| 415 | vcombine_bf16(vget_high_bf16(a0), vget_high_bf16(a1))); |
| 416 | } |
| 417 | |
| 418 | out += 2 * row_pair_count * TileSize; |
| 419 | } |
| 420 | |
| 421 | for (; k_idx < k; k_idx += K) { |
| 422 | bfloat16x4_t a0 = vld1_bf16(row[0] + k_idx); |
| 423 | bfloat16x4_t a1 = (actual_m > 1) ? vld1_bf16(row[1] + k_idx) : zero; |
| 424 | vst1q_bf16(out, vcombine_bf16(a0, a1)); |
| 425 | |
| 426 | a0 = (actual_m > 2) ? vld1_bf16(row[2] + k_idx) : zero; |
| 427 | a1 = (actual_m > 3) ? vld1_bf16(row[3] + k_idx) : zero; |
| 428 | vst1q_bf16(out + TileSize, vcombine_bf16(a0, a1)); |
| 429 | |
| 430 | if (actual_m > 4) { |
| 431 | a0 = vld1_bf16(row[4] + k_idx); |
| 432 | a1 = (actual_m > 5) ? vld1_bf16(row[5] + k_idx) : zero; |
| 433 | vst1q_bf16(out + 2 * TileSize, vcombine_bf16(a0, a1)); |
| 434 | |
| 435 | a0 = (actual_m > 6) ? vld1_bf16(row[6] + k_idx) : zero; |
| 436 | a1 = (actual_m > 7) ? vld1_bf16(row[7] + k_idx) : zero; |
| 437 | vst1q_bf16(out + 3 * TileSize, vcombine_bf16(a0, a1)); |
| 438 | } |
| 439 | out += row_pair_count * TileSize; |
| 440 | } |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | void gemm(DEFINE_CPU_MICRO_GEMM_PARAMS) { |
| 445 | (void)lda; // A is packed, so lda is not needed |
| 446 | TORCH_CHECK_EQ(k % K, 0); |
| 447 | |
| 448 | for (int32_t n_idx = 0; n_idx < NSize; n_idx += NrGemv) { |
| 449 | const bfloat16_t* __restrict__ b_panel = |
| 450 | reinterpret_cast<const bfloat16_t*>(b_ptr) + n_idx * k; |
| 451 | |
| 452 | for (int32_t row_base = 0; row_base < m; row_base += Mr) { |
| 453 | const int32_t panel_m = std::min(Mr, m - row_base); |
| 454 | const bfloat16_t* __restrict__ a_panel = |
| 455 | reinterpret_cast<const bfloat16_t*>(a_ptr) + row_base * k; |
| 456 | float* __restrict__ c_panel = c_ptr + row_base * ldc + n_idx; |
| 457 | |
| 458 | if (panel_m <= 4) { |
| 459 | gemm_micro_bfmmla_4x16_packed_a(a_panel, b_panel, c_panel, panel_m, k, |
| 460 | b_n_group_stride, ldc, accum_c); |
| 461 | } else { |
| 462 | gemm_micro_bfmmla_8x8_packed_a(a_panel, b_panel, c_panel, panel_m, k, |
| 463 | ldc, accum_c); |
| 464 | gemm_micro_bfmmla_8x8_packed_a(a_panel, b_panel + b_n_group_stride, |
| 465 | c_panel + Nr, panel_m, k, ldc, |
| 466 | accum_c); |
| 467 | } |
| 468 | } |
| 469 | } |
| 470 | } |
| 471 | |
| 472 | // physical layout [ |
| 473 | // N / 8; Nr is 8 |
| 474 | // K / 4; K for bfmmla is 4 |
| 475 | // 4, ; 4 col-pairs for each 8 cols |
| 476 | // 2, ; col-pair is 2 cols |
| 477 | // 4 ; 4 elements per col |
| 478 | // ] |
| 479 | static void pack_weight(const c10::BFloat16* __restrict__ weight, |
| 480 | c10::BFloat16* __restrict__ packed_weight, |
| 481 | const int32_t output_size, const int32_t input_size) { |
| 482 | TORCH_CHECK_EQ(output_size % NSize, 0); |
| 483 | TORCH_CHECK_EQ(input_size % K, 0); |
| 484 | |
| 485 | for (int32_t o_idx = 0; o_idx < output_size; o_idx += Nr) { |
| 486 | c10::BFloat16* __restrict__ dst = packed_weight + o_idx * input_size; |
| 487 | for (int32_t k_idx = 0; k_idx < input_size; k_idx += K) { |
| 488 | for (int32_t pair_idx = 0; pair_idx < Nr; pair_idx += Cols) { |
| 489 | const c10::BFloat16* __restrict__ row0 = |
| 490 | weight + (o_idx + pair_idx) * input_size; |
| 491 | const c10::BFloat16* __restrict__ row1 = row0 + input_size; |
| 492 | dst[0] = row0[k_idx + 0]; |
| 493 | dst[1] = row0[k_idx + 1]; |
| 494 | dst[2] = row0[k_idx + 2]; |
| 495 | dst[3] = row0[k_idx + 3]; |
| 496 | dst[4] = row1[k_idx + 0]; |
| 497 | dst[5] = row1[k_idx + 1]; |
| 498 | dst[6] = row1[k_idx + 2]; |
| 499 | dst[7] = row1[k_idx + 3]; |
| 500 | dst += TileSize; |
| 501 | } |
| 502 | } |
| 503 | } |
| 504 | } |
| 505 | }; |
| 506 | |
| 507 | } // namespace cpu_micro_gemm |
| 508 | |
| 509 | #endif |