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A high-throughput and memory-efficient inference and serving engine for LLMs

[Bugfix] Pass TP group to FlashInfer all-reduce fusion (#45917)

Signed-off-by: Daniel Serebrenik <daserebrenik@nvidia.com>

danisereb committed Jun 17, 2026 at 18:24 UTC 5e27b2baf481518410a9aa5d6b2840cbb2d6ba49
2 files changed +2 -8
vllm/config/vllm.py
+1 -8
@@ -129,13 +129,7 @@ def enable_act_fusion(cfg: "VllmConfig") -> bool:
129
130
131 def enable_allreduce_rms_fusion(cfg: "VllmConfig") -> bool:
132 - """Enable if TP > 1, PP == 1, Hopper/Blackwell, and flashinfer installed.
133 -
134 - Gated off for PP > 1: the fused op's GPU-side peer-signal spin-wait
135 - assumes byte-identical kernel launches across TP peers, but concurrent
136 - independent warmup of multiple TP subgroups lets ranks pick divergent
137 - FlashInfer launch configs and deadlock.
138 - """
132 + """Enable if TP > 1 and Hopper/Blackwell and flashinfer installed."""
133 from vllm.platforms import current_platform
134 from vllm.utils.flashinfer import has_flashinfer
135
@@ -148,7 +142,6 @@ def enable_allreduce_rms_fusion(cfg: "VllmConfig") -> bool:
142
143 return (
144 cfg.parallel_config.tensor_parallel_size > 1
151 - and cfg.parallel_config.pipeline_parallel_size == 1
145 and current_platform.is_cuda()
146 and has_flashinfer()
147 and (
vllm/distributed/device_communicators/flashinfer_all_reduce.py
+1
@@ -61,6 +61,7 @@ def _create_workspace(
61 hidden_dim=hidden_dim,
62 dtype=dtype,
63 comm_backend=comm_backend,
64 + group=group,
65 )
66 except Exception as e:
67 if "multicast" in str(e).lower():