target/riscv/cpu.c: add xlrbr isa_edata_arr[] entry

Daniel Henrique Barboza committed 5 months ago

hw: misc: Implement Microchip mpfs ioscb PLLs and sysreg clock dividers

Guenter Roeck committed 4 months ago

hw/riscv/riscv-iommu: Avoid caching PCI device IDs

Chengbo Gao committed 4 months ago

hw/riscv/riscv-iommu: fix FSC SV32 capability check

Zishun Yi committed 5 months ago

target/riscv/kvm: Add BFloat16 extensions support

Zongmin Zhou committed 5 months ago

target/riscv/kvm: add KVM support for Zicbop extension

Zongmin Zhou committed 5 months ago

target/riscv: clear mseccfg on reset for all dependent extensions

Zishun Yi committed 5 months ago

target/riscv: Update the local interrupt mask

Alistair Francis committed 5 months ago

target/riscv: Add mseccfg to VMStateDescription

Zishun Yi committed 5 months ago

target/riscv/pmp: Fix integer overflow in TOR and NA4 address computation

Zishun Yi committed 5 months ago

target/riscv: Fix missing CDE check for scountinhibit

Zishun Yi committed 5 months ago

target/riscv: Remove unconditional MENVCFG_CDE from mask

Zishun Yi committed 5 months ago

target/riscv: add Zvknha as an implied extension for Zvknhb

Zishun Yi committed 5 months ago

target/riscv: Fix tail handling for vmv.s.x and vfmv.s.f

chen.zhongyao@zte.com.cn committed 5 months ago

target/riscv: Fix medeleg[11] read-only zero bit for M-mode ECALL

Abhigyan Kumar committed 5 months ago

hw/char: Check interrupt after txctrl register is written

Frank Chang committed 5 months ago

target/riscv: rvv: Handle source overlap of vector widening reduction instructions

Anton Blanchard committed 5 months ago

hw/riscv/riscv-iommu: Fix Svnapot 64KB pages

Andrew Jones committed 5 months ago

target/riscv: Allow mseccfg access based on ext_zicfilp

Zishun Yi committed 5 months ago

riscv: virt: avoid RISCVCPU copy in PMU FDT setup

Mohamed Ayman committed 5 months ago